參數(shù)資料
型號(hào): PEB2447
廠商: SIEMENS AG
英文描述: Memory Time Switch Extended Large MTSXL
中文描述: 內(nèi)存定時(shí)開關(guān)擴(kuò)展大型MTSXL
文件頁數(shù): 13/51頁
文件大?。?/td> 1052K
代理商: PEB2447
PEB 2447
Functional Description
Semiconductor Group
13
03.97
During operation of the chip a frame length check is also supplied, which controls correct
synchronization by the SP pulse and generates an interrupt in case of lost or achieved
synchronization.
The unused output ports are tristated by mode selection, whereas unused time slots are
tristated by an additional bit in the control memory. By using this tristate capability the
MTSXL can be easily expanded to a time switch of any size.
The standard 8-bit
μ
P interface can communicate with Intel demultiplexed
microprocessors. It gives access to the internal registers and to the control and data
memory. All registers are directly addressable. The memories are accessed by a simple
four byte indirect access method.
2.2
The activity of all special functions can be read in the status register. Completion of these
functions is indicated by interrupts.
Special Functions
2.2.1
Initialization of the device after a hardware reset (RES) is easily done with a
μ
P
command “control memory reset”. After finishing this procedure all control memory
channels contain the information “tristated”. Apart from this tristate information the
contents of the C Memory is undefined.
Control Memory Reset
2.2.2
A command including the address (0 … 5) will be given by the
μ
P. The rising edge of the
corresponding frame measurement signal (FS0 … FS5) will be evaluated. The exact
timing of the FS edge can then be read from an internal 12-bit register (resolution of a
complete 8 kHz frame in half 16 MHz clock periods).
Evaluate Frame Measurement Signal
2.2.3
The switching path of the MTSXL including input buffer, data memory, control memory,
output buffer and timing control can be tested in the system by a 2-step built-in selftest.
Activating this mechanism takes 2
×
0.625 ms (16.384 MHz). Finally the result “selftest
ok/selftest not ok” can be read from the internal status register.
After test completion the control memory has also been reset (contains the information
tristated).
The selftest can also be started and checked via the boundary scan interface.
Note: For correct execution of the built-in selftest the MTSXL needs a value of
ICSR = 00. If MODR:PSB = 0 (e.g. after hardware reset) this value is programmed
automatically after start of the selftest procedure. If ICSR does not contain “00”
with MODR:PSB = 1 the selftest will fail.
MTSXL Selftest
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