參數(shù)資料
型號(hào): PE97632
廠商: Electronic Theatre Controls, Inc.
英文描述: 3.2 GHz Delta-Sigma modulated Fractional-N Frequency Synthesizer for Low Phase Noise Applications
中文描述: 3.2 GHz的Δ-Σ調(diào)制的低相位噪聲應(yīng)用分?jǐn)?shù)N頻率合成器
文件頁數(shù): 12/16頁
文件大?。?/td> 373K
代理商: PE97632
Advance Information
PE97632
Page 12 of 16
2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0205-02
UltraCMOS RFIC Solutions
Figure 5. Typical Phase Noise
Phase Detector
The phase detector is triggered by rising edges
from the main Counter (f
p
) and the reference
counter (f
c
). It has two outputs, namely PD_U,
and PD_D. If the divided VCO leads the divided
reference in phase or frequency (f
p
leads f
c
),
PD_D pulses “l(fā)ow”. If the divided reference leads
the divided VCO in phase or frequency (f
c
leads
f
p
), PD_U pulses “l(fā)ow”. The width of either pulse
is directly proportional to phase offset between the
two input signals, f
p
and f
c
.
For the UP and DOWN mode, PD_U and PD_D
drive an active loop filter which controls the VCO
tune voltage. The phase detector gain is equal to
VDD / 2
п
.
PD_
U
pulses cause an increase in VCO fre-
quency and PD_
D
pulses cause a decrease in
VCO frequency, for a positive Kv VCO.
A lock detect output, LD is also provided, via the
pin Cext. Cext is the logical “NAND” of PD_
U
and
PD_
D
waveforms, which is driven through a series
2 k
resistor. Connecting Cext to an external
shunt capacitor provides low pass filtering of this
signal. Cext also drives the input of an internal in-
verting comparator with an open drain output.
Thus LD is an “AND” function of PD_
U
and PD_
D.
A typical phase noise plot is shown below. “Trace 1” is the smoothed average, and “Trace 2” is the raw data
.
Test Conditions: A typical phase noise plot is shown below. “Trace 1” is the smoothed average, and “Trace 2” is the raw
data. Test Conditions: Fout = 1.9204 GHz in MASH 1-1 mode, Fcomparison = 20 MHz, V
DD
= 3.3 V, Temp = 25 C,
Loop bandwidth = 50 kHz.
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