參數(shù)資料
型號(hào)： PDI1394L40
廠商： NXP Semiconductors N.V.
英文描述： 1394 enhanced AV link layer controller
中文描述： 1394增強(qiáng)影音鏈路層控制器
文件頁數(shù)： 17/42頁
文件大?。?/td> 233K
代理商： PDI1394L40
Philips Semiconductors
Preliminary data
PDI1394P23
2-port/1-port 400 Mbps physical layer interface
2001 Sep 06
17
The Port Status page provides access to configuration and status information for each of the ports. The port is selected by writing 0 to the
Page_Select field and the desired port number to the Port_Select field in base register 7. The configuration of the port status page registers is
shown in Table 3 and corresponding field descriptions given in Table 4. If the selected port is unimplemented, all registers in the port status page
are read as 0.
Table 3. Page 0 (Port Status) Register Configuration
ADDRESS
BIT POSITION
3
0
1
2
4
5
6
7
1000
1001
1010
1011
1100
1101
1110
1111
AStat
BStat
Ch
Fault
Con
Bias
Dis
Peer_Speed
PIE
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Table 4. Page 0 (Port Status) Register Field Descriptions
FIELD
SIZE
2
TYPE
Rd
DESCRIPTION
AStat
TPA line state. This field indicates the TPA line state of the selected port, encoded as follows:
Code
Arb Value
11
Z
01
1
10
0
00
invalid
BStat
2
Rd
TPB line state. This field indicates the TPB line state of the selected port. This field has the same
encoding as the ASTAT field.
Child/parent status. A 1 indicates that the selected port is a child port. A 0 indicates that the selected
port is the parent port. A disconnected, disabled, or suspended port is reported as a child port. The Ch
bit is invalid after a bus-reset until tree-ID has completed.
Ch
1
Rd
Con
1
Rd
Debounced port connection status. This bit indicates that the selected port is connected. The
connection must be stable for the debounce time of 330ms–350ms for the Con bit to be set to 1. The
Con bit is reset to 0 by hardware reset and is unaffected by bus reset.
NOTE:
The Con bit indicates that the port is physically connected to a peer PHY, but the port is not
necessarily active.
Debounced incoming cable bias status. A 1 indicates that the selected port is detecting incoming cable
bias. The incoming cable bias must be stable for the debounce time of 41.6
μ
s–52
μ
s for the Bias bit to
be set to 1.
Bias
1
Rd
Dis
1
Rd/Wr
Port disabled control. If 1, the selected port is disabled. The Dis bit is reset to 0 by hardware reset (all
ports are enabled for normal operation following hardware reset). The Dis bit is not affected by bus
reset.
Peer_Speed
3
Rd
Port peer speed. This field indicates the highest speed capability of the peer PHY connected to the
selected port, encoded as follows:
Code
Peer Speed
000
S100
001
S200
010
S400
011–111
invalid
The Peer_Speed field is invalid after a bus reset until self-ID has completed.
NOTE:
Peer speed codes higher than 010b (S400) are defined in P1394a. However, the PDI1394P23
is only capable of detecting peer speeds up to S400.
PIE
1
Rd/Wr
Port event interrupt enable. When set to 1, a port event on the selected port will set the port event
interrupt (PEI) bit and notify the link. This bit is reset to 0 by a hardware reset, and is unaffected by
bus-reset.
Fault
1
Rd/Wr
Fault. This bit indicates that a resume-fault or suspend-fault has occurred on the selected port, and that
the port is in the suspended state. A resume-fault occurs when a resuming port fails to detect incoming
cable bias from its attached peer. A suspend-fault occurs when a suspending port continues to detect
incoming cable bias from its attached peer. Writing 1 to this bit clears the fault bit to 0. This bit is reset to
0 by hardware reset and is unaffected by bus reset.
相關(guān)PDF資料
PDF描述
PDI1394L40BE 8349 TBGA NO PB W/O ENC
PDI1394P11 3-port physical layer interface
PDI1394P11BD 3-port physical layer interface
PDI1394P25 1-port 400 Mbps physical layer interface
PDI1394P25BD 1-port 400 Mbps physical layer interface
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PDI1394L40BE 制造商:NXP Semiconductors 功能描述:1 CHANNEL(S), 400M BPS, SERIAL COMM CONTROLLER, PQFP144
PDI1394L40BE,518 功能描述:視頻 IC 1394 A/V LINK LAYER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
PDI1394L40BE,551 制造商:NXP Semiconductors 功能描述:1394 A/V LINK LAYER - Trays
PDI1394L40BE,557 功能描述:視頻 IC DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
PDI1394L40BEGA 功能描述:IC IEEE 1394 LINK CTRLR 144-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
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