參數(shù)資料
型號: PCM9211PTR
廠商: TEXAS INSTRUMENTS INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: DATACOM, TOKEN RING TRANSCEIVER, PQFP48
封裝: GREEN, PLASTIC, LQFP-48
文件頁數(shù): 83/121頁
文件大?。?/td> 1219K
代理商: PCM9211PTR
SBAS495 – JUNE 2010
www.ti.com
Register 21h, DIR Initial Settings 1/3
(Address: 21h, Write and Read)
DATA
B7
B6
B5
B4
B3
B2
B1
B0
Reg Name
RSV
RXFSRNG
RSV
Default Value
0
Memo
RXFSRNG: DIR Receivable Incoming Biphase Sampling Frequency Range Setting
0: Wide Mode (7 kHz to 216 kHz) (default)
1: Normal Mode (28 kHz to 108 kHz)
spacer
Register 22h, DIR Initial Settings 2/3
(Address: 22h, Write and Read)
DATA
B7
B6
B5
B4
B3
B2
B1
B0
Reg Name
RSV
CLKSTCON
RSV
CLKSTP
RSV
RXVDLY
Default Value
0
1
Memo
CLKSTCON: CLKST Output Condition Setting
0: Only PLL Lock status change (default)
1: All events where the Main port output clock condition changes, as well as these cases:
1. MOSSRC/MOPSRC Register is updated to ADC, AUXIN0, AUXIN1, or AUXIN2
2. DIR and ADC are switched by DIR status when MOSSRC = 000(AUTO) and MOPSRC =
000(AUTO)
3. Main port sampling frequency changes when PFSTGT = 101(Main output port)
NOTES:
CLKST never outputs when updating MOSSRC and MOPSRC to AUTO or DIR.
OSCAUTO must be '0' when CLKST is used because CLKST is generated by frequency counting of
built-in oscillator circuit.
To output CLKST, MOSSRC and MOPSRC are set simultaneously.
CLKSTP: CLKST Polarity Setting
0: Active low (default)
1: Active high
RXVDLY: VOUT Delay Setting
0: VOUT is active immediately after validity flag is detected
1: VOUT is active after synchronization with DOUT data (default)
64
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): PCM9211
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