參數(shù)資料
型號: PCM1602APT
廠商: Texas Instruments
文件頁數(shù): 18/46頁
文件大?。?/td> 0K
描述: IC DAC 24BIT 192KHZ 6CH 48-LQFP
產(chǎn)品培訓模塊: Data Converter Basics
標準包裝: 1
位數(shù): 24
數(shù)據(jù)接口: 串行
轉換器數(shù)目: 6
電壓電源: 模擬和數(shù)字
功率耗散(最大): 240mW
工作溫度: -25°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 標準包裝
輸出數(shù)目和類型: 6 電壓,單極
采樣率(每秒): 192k
配用: DEM-DAI1602-ND - EVAL FIXTURE FOR PCM1602
其它名稱: 296-18701-6
www.ti.com
SLES146A – AUGUST 2005 – REVISED OCTOBER 2010
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
REGISTER 9
R/W
IDX6
IDX5
IDX4
IDX3
IDX2
IDX1
IDX0
RSV
FLT
CLKD
CLKE
FMT2
FMT1
FMT0
R/W – Read/Write Mode Select
When R/W = 0, a write operation is performed.
When R/W = 1, a read operation is performed.
Default value: 0
FLT – Digital Filter Rolloff Control
This bit is read/write.
Default value: 0
FLT = 0
Sharp rolloff (default)
FLT = 1
Slow rolloff
The FLT bit allows users to select the digital filter rolloff that is best suited to their application. Two filter rolloff
selections are available: sharp or slow. The filter responses for these selections are shown in the Typical
Performance Curves section of this data sheet.
CLKD – SCKO Frequency Selection
This bit is read/write.
Default value: 0
CLKD = 0
Full-rate, fSCKO = fSCKI (default)
CLKD = 1
Half-rate, fSCKO = fSCKI/2
The CLKD bit is used to determine the clock frequency at the system clock output pin, SCKO.
CLKE – SCKO Output Enable
This bit is read/write.
Default value: 0
CLKE = 0
SCKO enabled (default)
CLKE = 1
SCKO disabled
The CLKE bit is used to enable or disable the system clock output pin, SCKO. When SCKO is enabled, it outputs
either a full- or half-rate clock, based on the setting of the CLKD bit. When SCKO is disabled, it is set to a LOW
level.
FMT[2:0] – Audio Interface Data Format
These bits are read/write.
Default value: 000b
FMT[2:0]
Audio Data Format Selection
000
24-bit standard format, right-justified data (default)
001
20-bit standard format, right-justified data
010
18-bit standard format, right-justified data
011
16-bit standard format, right-justified data
100
I2S format, 16- to 24-bit
101
Left-justified format, 16- to 24-bit
110
Reserved
111
Reserved
The FMT[2:0] bits are used to select the data format for the serial audio interface.
Copyright 2005–2010, Texas Instruments Incorporated
25
Product Folder Link(s): PCM1602A
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