參數(shù)資料
型號： PCKV857ADGG
廠商： NXP SEMICONDUCTORS
元件分類： 時(shí)鐘及定時(shí)
英文描述： 100-250 MHz differential 1:10 clock driver
中文描述： PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
封裝： 6.10 MM, PLASTIC, MO-153, SOT-362-1, TSSOP-48
文件頁數(shù)： 4/13頁
文件大小： 101K
代理商： PCKV857ADGG
Philips Semiconductors
Product data
PCKV857A
100-250 MHz differential 1:10 clock driver
2003 Jul 31
4
ABSOLUTE MAXIMUM RATINGS
1
LIMITS
SYMBOL
PARAMETER
CONDITION
MIN
MAX
UNIT
V
DDQ
AV
DD
V
I
V
O
I
IK
I
OK
I
O
Supply voltage range
0.5
3.6
V
Supply voltage range
0.5
3.6
V
Input voltage range
see Notes 2 and 3
-0.5
V
DDQ
+
0.5
V
DDQ
+
0.5
±
50
±
50
±
50
±
100
+
150
V
Output voltage range
see Notes 2 and 3
-0.5
V
Input clamp current
V
I
< 0 or V
I
>V
DDQ
V
O
< 0 or V
O
>V
DDQ
V
O
= 0 to V
DDQ
—
mA
Output clamp current
—
mA
Continuous output current
—
mA
Continuous current to GND or V
DDQ
Storage temperature range
—
mA
°
C
T
stg
-65
NOTES:
1. Stresses beyond those listed under
“
absolute maximum ratings
”
may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
“
recommended operating
conditions
”
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. This value is limited to 3.6 V maximum.
RECOMMENDED OPERATING CONDITIONS
1
LIMITS
TYP
SYMBOL
PARAMETER
CONDITION
MIN
MAX
UNIT
V
DDQ
AV
DD
Supply voltage range
2.3
—
2.7
V
Supply voltage range
2.2
—
2.7
V
V
IL
LOW-level input voltage
CLK, CLK,
FB
IN
, FB
IN
PWRDWN
—
—
V
DDQ
/2
0.18
V
0.3
—
0.7
V
IH
HIGH-level input voltage
CLK, CLK,
FB
IN
, FB
IN
PWRDWN
V
DDQ
/2
+
0.18
—
—
V
1.7
0.3
0.36
—
V
DDQ
+
0.3
V
DDQ
V
DDQ
+
0.6
V
DDQ
+
0.6
V
DDQ
/2
+
0.2
V
DDQ
/2
+
0.2
12
12
DC input signal voltage
Note 2
—
V
DC differential input signal voltage
CLK, FB
IN
CLK, FB
IN
Note 3
—
V
V
ID
AC differential input signal voltage
Note 3
0.7
—
V
V
OX
V
IX
I
OH
I
OL
SR
Output differential cross-voltage
Note 4
V
DDQ
/2
0.2
V
DDQ
/2
0.2
—
V
DDQ
/2
—
V
Input differential cross-voltage
Note 4
V
HIGH-level output current
—
mA
LOW-level output current
—
—
mA
Input slew rate
1
—
4
V/ns
°
C
T
amb
Operating free-air temperature
0
—
70
NOTES:
1. Unused inputs must be held HIGH or LOW to prevent them from floating.
2. DC input signal voltage specifies the allowable DC execution of differential input.
3. Differential input signal voltage specifies the differential voltage |VTR - VCP| required for switching, where VTR is the true input level and
VCP is the complementary input level.
4. Differential cross-point voltage is expected to track variations of V
CC
and is the voltage at which the differential signals must be crossing.
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參數(shù)描述
PCKV857ADGG,512 功能描述:鎖相環(huán) - PLL 70-190MHZ 2.5V DIF1:10 CLK DRV RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
PCKV857ADGG,518 功能描述:鎖相環(huán) - PLL 70-190MHZ 2.5V DIF1:10 CLK DRV RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
PCKV857ADGV 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:100-250 MHz differential 1:10 clock driver
PCKV857ADGV,112 功能描述:鎖相環(huán) - PLL 70-190MHZ 2.5V DIF1:10 CLK DRV RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
PCKV857ADGV,118 功能描述:鎖相環(huán) - PLL 70-190MHZ 2.5V DIF1:10 CLK DRV RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
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