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參數(shù)資料
| 型號： | PCK2022RADGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | CK00 (100/133 MHz) spread spectrum differential system clock generator |
| 中文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, MO-153, SOT-362-1, TSSOP-48 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大?。?/td> | 100K |
| 代理商： | PCK2022RADGG |
Philips Semiconductors
Product data
PCK2022RA
CK00 (100/133 MHz) spread spectrum differential
system clock generator
2003 Jul 31
6
ABSOLUTE MAXIMUM RATINGS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
VDD3
DC 3.3 V supply
-0.5
4.6
V
IIK
DC input diode current
VI < 0
—
-50
mA
VI
DC input voltage
Note 2
-0.5
VDD
V
IOK
DC output diode current
VO > VDD or VO < 0
—
±50
mA
VO
DC output voltage
Note 2
-0.5
VDD+0.5
V
IO
DC output source or sink current
VO = 0 to VDD
—
±50
mA
Tstg
Storage temperature range
-65
+150
°C
Ptot
Power dissipation per package
plastic medium-shrink (SSOP)
For temperature range -40
°C to +125°C;
above +55
°C derate linearly with 11.3 mW/K
—
850
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other condition beyond those indicated under “recommended operating condition” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage rating may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
VDD3
DC 3.3 V supply voltage1
3.135
3.465
V
AVDD
DC 3.3 V analog supply voltage1
3.135
3.465
V
CL
Capacitive load on:
L
IOCLK
Must meet IOCLK 2.1 requirements
10
30
pF
48 MHz clock
1 device load
10
20
pF
REF
1 device load
10
20
pF
fref
Reference frequency, oscillator normal value
14.31818
MHz
Tamb
Operating ambient temperature range in free air
0
+70
°C
NOTE:
1. Supply voltage needs to be less than 20 mV before powering on to ensure proper PLL start-up.
POWER MANAGEMENT
CONDITION
MAXIMUM 3.3 V SUPPLY CONSUMPTION
MAXIMUM DISCRETE CAPACITANCE LOADS
VDDL = 3.465 V
ALL STATIC INPUTS = VDD3 OR VSS
Power-down mode (PWRDWN = 0)
60 mA
Full active 100/133 MHz
250 mA
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCK2022RDGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK00 100/133 MHz spread spectrum differential system clock generator |
| PCK2023 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK408 66/100/133/200 MHz spread spectrum differential system clock generator |
| PCK2023DGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK408 66/100/133/200 MHz spread spectrum differential system clock generator |
| PCK2023DGG,512 | 制造商:NXP Semiconductors 功能描述:PLL Clock Synthesizer Dual Up to 200MHz 56-Pin TSSOP Tube Tube |
| PCK2023DL | 功能描述:鎖相環(huán) - PLL WIT -CHG 112 TO 512 PCK METHOD RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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