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參數(shù)資料
| 型號(hào)： | PCK12429 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 25-400 MHz differential PECL clock generator |
| 中文描述： | 25-400 MHz的差分PECL時(shí)鐘發(fā)生器 |
| 文件頁(yè)數(shù)： | 10/14頁(yè) |
| 文件大?。?/td> | 128K |
| 代理商： | PCK12429 |
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Philips Semiconductors
Product data
PCK12429
25–400 MHz differential PECL clock generator
2002 Jun 03
10
Jitter performance of the PCK12429
The PCK12429 exhibits long term and cycle-to-cycle jitter which
rivals that of SAW based oscillators. This jitter performance comes
with the added flexibility one gets with a synthesizer over a fixed
frequency oscillator.
0
5
10
15
20
200
220
240
260
VCO FREQUENCY (MHz)
280
300
320
340
360
380
400
N = 1
N = 2
N = 4
N = 8
SW01010
R
Figure 5. RMS PLL jitter versus VCO frequency
Figure 5 illustrates the RMS jitter performance of the PCK12429
across its specified VCO frequency range. Note that the jitter is a
function of both the output frequency as well as the VCO frequency,
however the VCO frequency shows a much stronger dependence.
The data presented has not been compensated for trigger jitter, this
fact provides a measure of guardband to the reported data. In
addition the data represents long term period jitter, the cycle-to-cycle
jitter could not be measured to the level of accuracy required with
available test equipment but certainly will be smaller than the long
term period jitter.
The most commonly specified jitter parameter is cycle-to-cycle jitter.
Unfortunately with today’s high performance measurement
equipment there is no way to measure this parameter for jitter
performance in the class demonstrated by the PCK12429. As a
result, different methods are used which approximate cycle-to-cycle
jitter. The typical method of measuring the jitter is to accumulate a
large number of cycles, create a histogram of the edge placements,
and record peak-to-peak as well as standard deviations of the jitter.
Care must be taken that the measured edge is the edge immediately
following the trigger edge. The oscilloscope cannot collect adjacent
pulses, rather it collects pulses from a very large sample of pulses. It
is safe to assume that collecting pulse information in this mode will
produce period jitter values somewhat larger than if consecutive
cycles (cycle-to-cycle jitter) were measured. All of the jitter data
reported on the PCK12429 was collected in this manner.
Figure 6 shows the jitter as a function of the output frequency. For
the PCK12429, this information is probably of more importance. The
flat line represents an RMS jitter value that corresponds to an
8 sigma
±
25 ps peak-to-peak long term period jitter. The graph
shows that for output frequencies from 125 to 400 MHz the jitter falls
within the
±
25 ps peak-to-peak specification. The general trend is
that as the output frequency is decreased the output edge jitter will
increase.
0.00
5.00
10.00
15.00
20.00
25.00
25 50 75 100 125150175 200225250275300 325350375400
OUTPUT FREQUENCY (MHz)
6.25 ps REFERENCE (1 SIGMA)
SW01011
R
Figure 6. RMS jitter versus output frequency
The jitter data presented should provide users with enough
information to determine the effect on their overall timing budget.
The jitter performance meets the needs of most system designs
while adding the flexibility of frequency margining and field
upgrades. These features are not available with a fixed frequency
SAW oscillator.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCK12429A | 功能描述:鎖相環(huán) - PLL 25-400 MHZ DIFF PECL CLOCK GEN RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PCK12429A,112 | 功能描述:鎖相環(huán) - PLL 25-400 MHZ DIFF PECL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PCK12429A,118 | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 25-400 MHZ DIFF PECL RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| PCK12429A-T | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 25-400 MHZ DIFF PECL CLOCK GEN RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| PCK12429BD | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 25-400MHZ DIFF PECL CLOCK GEN RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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