參數(shù)資料
型號: PCF5001H
廠商: NXP SEMICONDUCTORS
元件分類: 尋呼電路
英文描述: POCSAG Paging Decoder
中文描述: TELECOM, PAGING DECODER, PQFP32
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-358-1, LQFP-32
文件頁數(shù): 28/44頁
文件大?。?/td> 273K
代理商: PCF5001H
1997 Mar 04
28
Philips Semiconductors
Product specification
POCSAG Paging Decoder
PCF5001
Fig.20 EEPROM data transfer to microcontroller timing.
B17
D17
FR12
SR
DO
DS
SPF
32
MCD472
ENC
ENA
tSDD
tDSE
7.23
Test modes of the decoder
The decoder supports two test modes, which are intended
for use during pager production and type approval tests.
7.23.1
B
OARD TEST MODE
‘Board test’ mode is selected by setting the PD input LOW
at any time. In this test mode the following features are
provided:
1.
Receiver enable output is set constantly HIGH
2.
Output AL is activated by a LOW-level on ON input
3.
Output AH is activated by a HIGH-level on SR input
4.
Outputs OL and OM are activated by a HIGH-level on
SK input.
Exit from ‘board test’ mode is achieved by setting input PD
HIGH.
7.23.2
P
AGER
T
EST
M
ODE
(T
YPE
A
PPROVAL
M
ODE
)
‘Pager test’ mode is entered by reception of a valid call
while ‘board test’ mode is active, see above. In ‘pager test’
mode:
1.
Call alert cadences are terminated after 2 seconds
2.
Duplicate call suppression is disabled.
Exit from ‘pager test’ mode is achieved by disconnecting
the power supply from the decoder.
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