參數(shù)資料
型號： PCF2116xU
廠商： NXP Semiconductors N.V.
英文描述： LCD controller/drivers(LCD控制器/驅(qū)動器)
中文描述： LCD控制器/驅(qū)動器（液晶顯示控制器/驅(qū)動器）
文件頁數(shù)： 38/64頁
文件大?。?/td> 407K
代理商： PCF2116XU
1997 Apr 07
38
Philips Semiconductors
Product specification
LCD controller/drivers
PCF2116 family
16 AC CHARACTERISTICS
V
DD
= 2.5 to 6.0 V; V
SS
= 0 V; V
LCD
= V
DD
3.5 V to V
DD
9 V; T
amb
=
40
°
C to +85
°
C; unless otherwise specified.
Notes
1.
2.
V
DD
= 5 V.
All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to
V
IL
and V
IH
with an input voltage swing of V
SS
to V
DD
.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
f
FR
f
osc
LCD frame frequency (internal clock); note 1
external clock frequency
40
90
65
150
100
225
Hz
kHz
Bus timing characteristics: Parallel Interface;
notes 1 and 2
W
RITE OPERATION
(
WRITING DATA FROM MICROCONTROLLER TO
PCF2116)
T
cy
PW
EH
t
ASU
t
AH
t
DSW
t
HD
R
EAD OPERATION
(
READING DATA FROM
PCF2116
TO MICROCONTROLLER
)
enable cycle time
enable pulse width
address set-up time
address hold time
data set-up time
data hold time
500
220
50
25
60
25
ns
ns
ns
ns
ns
ns
T
cy
PW
EH
t
ASU
t
AH
t
DHD
t
HD
enable cycle time
enable pulse width
address set-up time
address hold time
data delay time
data hold time
500
220
50
25
20
150
100
ns
ns
ns
ns
ns
ns
Timing characteristics: I
2
C-bus interface;
note 2
f
SCL
t
SW
t
BUF
t
SU;STA
t
HD;STA
t
LOW
t
HIGH
t
r
t
f
t
SU;DAT
t
HD;DAT
t
SU;STO
SCL clock frequency
tolerable spike width on bus
bus free time
set-up time for a repeated START condition
START condition hold time
SCL LOW time
SCL HIGH time
SCL and SDA rise time
SCL and SDA fall time
data set-up time
data hold time
set-up time for STOP condition
4.7
4.7
4
4.7
4
250
0
4
100
100
1
0.3
kHz
ns
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
ns
ns
μ
s
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