參數(shù)資料
型號: PCF2116xU
廠商: NXP Semiconductors N.V.
英文描述: LCD controller/drivers(LCD控制器/驅(qū)動器)
中文描述: LCD控制器/驅(qū)動器(液晶顯示控制器/驅(qū)動器)
文件頁數(shù): 11/64頁
文件大小: 407K
代理商: PCF2116XU
1997 Apr 07
11
Philips Semiconductors
Product specification
LCD controller/drivers
PCF2116 family
8.10
Address Counter (AC)
The Address Counter assigns addresses to the DDRAM
and CGRAM for reading and writing and is set by the
instructions ‘Set CGRAM address’ and
‘Set DDRAM address’. After a read/write operation the
Address Counter is automatically incremented or
decremented by 1.The Address Counter contents are
output to the bus (DB0 to DB6) when RS = logic 0 and
R/W = logic 1.
8.11
Display data RAM (DDRAM)
The display data RAM stores up to 80 characters of
display data represented by 8-bit character codes.
RAM locations not used for storing display data can be
used as general purpose RAM. The basic
DDRAM-to-display mapping scheme is shown in Fig.5.
With no display shift the characters represented by the
codes in the first 12 or 24 RAM locations starting at
address 00 in line 1 are displayed. Subsequent lines
display data starting at addresses 20, 40, or 60 Hex.
Figs 6 and 7 show the DDRAM-to-display mapping
principle when the display is shifted.
The address range for a 1-line display is 00 to 4F; for a
2-line display from 00 to 27 (line 1) and 40 to 67 (line 2);
for a 4-line display from 00 to 13, 20 to 33, 40 to 53 and
60 to 73 for lines 1, 2, 3 and 4 respectively.
For 2 and 4-line displays the end address of one line and
the start address of the next line are not consecutive.
When the display is shifted each line wraps around
independently of the others (Figs 6 and 7).
When data is written into the DDRAM wrap-around occurs
from 4F to 00 in 1-line mode and from 27 to 40 and
67 to 00 in 2-line mode; from 13 to 20, 33 to 40, 53 to 60
and 73 to 00 in 4-line mode.
8.12
Character generator ROM (CGROM)
The character generator ROM generates 240 character
patterns in 5
×
8 dot format from 8-bit character codes.
Figures 8 to 10 show the character sets currently
available.
8.13
Character generator RAM (CGRAM)
Up to 16 user-defined characters may be stored in the
character generator RAM. The CGROM and CGRAM use
a common address space, of which the first column is
reserved for the CGRAM (see Fig.8). Figure 11 shows the
addressing principle for the CGRAM.
8.14
Cursor control circuit
The cursor control circuit generates the cursor (underline
and/or character blink as shown in Fig.12) at the DDRAM
address contained in the Address Counter. When the
Address Counter contains the CGRAM address the cursor
will be inhibited.
8.15
Timing generator
The timing generator produces the various signals
required to drive the internal circuitry. Internal chip
operation is not disturbed by operations on the data buses.
8.16
LCD row and column drivers
The PCF2116 contains 32 row and 60 column drivers,
which connect the appropriate LCD bias voltages in
sequence to the display, in accordance with the data to be
displayed. The bias voltages and the timing are selected
automatically when the number of lines in the display is
selected. Figures 13 and 14 show typical waveforms.
In 1-line mode (1 : 16) the row outputs are driven in pairs:
R1/R17, R2/R18 for example. This allows the output pairs
to be connected in parallel, providing greater drive
capability.
Unused outputs should be left unconnected.
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