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參數(shù)資料
| 型號： | PCF21132 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | LCD controller/driver(LCD控制器/驅動器) |
| 中文描述： | LCD控制器/驅動器（液晶顯示控制器/驅動器） |
| 文件頁數(shù)： | 26/60頁 |
| 文件大?。?/td> | 392K |
| 代理商： | PCF21132 |
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1997 Apr 04
26
Philips Semiconductors
Product specification
LCD controller/driver
PCF2113x
9.4
Display control (and partial power-down mode)
9.4.1
D
The display is on when D = logic 1 and off when
D = logic 0. Display data in the DDRAM are not affected
and can be displayed immediately by setting D to logic 1.
When the display is off (D = logic 0) the chip is in partial
power-down mode:
The LCD-outputs are connected to V
SS
The LCD generator and bias generator are turned off.
3 OSC cycles are required after sending the ‘Display off’
instruction to ensure all outputs are at V
SS
, afterwards
OSC can be stopped. If the oscillator is running during
partial power-down mode (‘Display off’) the chip can still
execute instructions. Even lower current consumption is
obtained by inhibiting the oscillator (OSC = V
SS
).
To ensure I
DD
< 1
μ
A the parallel bus pins DB7 to DB0
should be connected to V
DD
; RS, R/W, to V
DD
or left open
and PD to V
DD
. Recovery from power-down mode: PD
back to logic 0, if necessary OSC back to V
DD
, send a
‘Display control’ instruction with D = logic 1.
9.4.2
C
The cursor is displayed when C = logic 1 and inhibited
when C = logic 0. Even if the cursor disappears, the
display functions I/D, etc. remain in operation during
display data write. The cursor is displayed using 5 dots in
the 8th line (see Fig.6).
9.4.3
B
The character indicated by the cursor blinks when
B = logic 1. The cursor character blink is displayed by
switching between display characters and all dots on with
a period of approximately 1 s, with
The cursor underline and the cursor character blink can be
set to display simultaneously.
9.5
Cursor/display shift
‘Cursor/display shift’ moves the cursor position or the
display to the right or left without writing or reading display
data. This function is used to correct a character or move
the cursor through the display. In 2-line displays, the
cursor moves to the next line when it passes the last
position (40) of the line. When the displayed data is shifted
repeatedly all lines shift at the same time; displayed
characters do not shift into the next line.
f
BLINK
f
52224
----------------
=
The Address Counter (AC) content does not change if the
only action performed is shift display, but increments or
decrements with the ‘cursor shift’.
9.6
Function set
9.6.1
DL (
PARALLEL MODE ONLY
)
Sets interface data width. Data is sent or received in bytes
(DB7 to DB0) when DL = logic 1 or in two nibbles
(DB7 to DB4) when DL = logic 0. When 4-bit width is
selected, data is transmitted in two cycles using the
parallel bus. In a 4-bit application DB3 to DB0 should be
left open (internal pull-ups). Hence in the first
‘Function set’ instruction after power-on N and H are set to
logic 1. A second ‘Function set’ must then be sent
(2 nibbles) to set N and H to their required values.
‘Function set’ from I
2
C-interface sets the DL bit to logic 1.
9.6.2
M
Chooses either 1-line by 24 display (M = 0) or 2-line by
12 display (M = 1).
9.6.3
H
When H = logic 0 the chip can be programmed via the
standard 11 instruction codes used in the PCF2116 and
other LCD controllers.
When H = logic 1 the extended range of instructions will be
used. These are mainly for controlling the display
configuration and the icons.
9.7
Set CGRAM address
‘Set CGRAM address’ sets bits 5 to 0 of the CGRAM
address (A
CG
in Table 6) into the Address Counter (binary
A[5] to A[0]).
Data can then be written to or read from the CGRAM.
Attention:
the CGRAM address uses the same address
register as the DDRAM address and consists of 7 bits
(binary A[6] to A[0]). With the ‘Set CGRAM address’
instruction, only bits 5 down to 0 are set. Bit 6 can be set
using the ‘Set DDRAM address’ instruction first, or by
using the auto-increment feature during CGRAM write.
All of bits 6 to 0 can be read using the
‘Read busy flag and address’ instruction.
When writing to the lower part of the CGRAM, make sure
that bit 6 of the address is not set (e.g. by an earlier
DDRAM write or read action).
相關PDF資料 |
PDF描述 |
|---|---|
| PCF211410 | LCD controller/drivers(LCD控制器/驅動器) |
| PCF2116AHZ | JT 66C 66#22D PIN RECP |
| PCF2116CHZ | LCD controller/drivers |
| PCF211412 | LCD controller/drivers(LCD控制器/驅動器) |
| PCF2114xU | LCD controller/drivers(LCD控制器/驅動器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PCF2113A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:LCD controller/driver |
| PCF2113AH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD Display Driver |
| PCF2113AU | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:LCD controllers/drivers |
| PCF2113AU/10/F2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:LCD controller/driver |
| PCF2113AU/10/F4 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:LCD controllers/drivers |
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