參數(shù)資料
型號: PCA9670PW,118
廠商: NXP Semiconductors
文件頁數(shù): 25/35頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 8B 16TSSOP
標(biāo)準(zhǔn)包裝: 2,500
接口: I²C
輸入/輸出數(shù): 8
中斷輸出:
頻率 - 時(shí)鐘: 1MHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
包括: POR
其它名稱: 935282716118
PCA9670PW-T
PCA9670PW-T-ND
PCA9670
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 30 May 2013
31 of 35
NXP Semiconductors
PCA9670
Remote 8-bit I/O expander for Fm+ I2C-bus with reset
19. Abbreviations
20. Revision history
Table 12.
Abbreviations
Acronym
Description
CDM
Charged-Device Model
CMOS
Complementary Metal-Oxide Semiconductor
ESD
ElectroStatic Discharge
GPIO
General Purpose Input/Output
HBM
Human Body Model
LED
Light Emitting Diode
IC
Integrated Circuit
I2C-bus
Inter IC bus
ID
Identification
LSB
Least Significant Bit
MSB
Most Significant Bit
PLC
Programmable Logic Controller
RAID
Redundant Array of Independent Disks
Table 13.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PCA9670 v.3
20130530
Product data sheet
-
PCA9670 v.2
Modifications:
Added (new) third bullet, “Keypads”
Added (new) eighth bullet, “Mobile devices”
Figure 2 “Simplified schematic diagram of P0 to P7” modified: removed diode between “VDD” and “P0
to P7”; removed exclusive-OR gate and signal “to interrupt logic”
Table 4 “PCA9670 address map” updated: added separate columns for “Write” and “Read” under
“Address byte value” column; added (new) column “7-bit hexadecimal address without R/W”
Section 7.2.1 “Software Reset”: added paragraph that follows Figure 9
first bullet item following first paragraph changed from “8 bits with the manufacturer name” to
“12 bits with the manufacturer name”
second bullet item re-written
List item 6. on page 9 changed from “starting with the 8 manufacturer bits ... , followed by the 13
part identification bits” to “starting with the 12 manufacturer bits ... , followed by the 9 part
identification bits”
Figure 11 modified: added “Sr” bit
added paragraph that follows Figure 11
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