參數(shù)資料
型號: PCA9555N
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 16-bit I2C and SMBus I/O port with interrupt
中文描述: 16 I/O, PIA-GENERAL PURPOSE, PDIP24
封裝: 0.600 INCH, PLASTIC, MO-015, SOT101-1, DIP-24
文件頁數(shù): 2/22頁
文件大小: 185K
代理商: PCA9555N
Philips Semiconductors
Product data sheet
PCA9555
16-bit I
2
C and SMBus I/O port with interrupt
2
2004 Sep 30
FEATURES
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant I/Os
Polarity inversion register
Active-LOW interrupt output
Low stand-by current
Noise filter on SCL/SDA inputs
No glitch on power-up
Internal power-on reset
16 I/O pins which default to 16 inputs
0 kHz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115, and 1000 V CDM per
JESD22-C101
Latch-up testing is done to JESDEC Standard JESD78 which
exceeds 100 mA
Five packages offered: DIP24, SO24, SSOP24, TSSOP24, and
HVQFN24
DESCRIPTION
The PCA9555 is a 24-pin CMOS device that provide 16 bits of
General Purpose parallel Input/Output (GPIO) expansion for
I
2
C/SMBus applications and was developed to enhance the Philips
family of I C I/O expanders. The improvements include higher drive
capability, 5 V I/O tolerance, lower supply current, individual I/O
configuration, and smaller packaging. I/O expanders provide a
simple solution when additional I/O is needed for ACPI power
switches, sensors, pushbuttons, LEDs, fans, etc.
The PCA9555 consist of two 8-bit Configuration (Input or Output
selection); Input, Output and Polarity inversion (Active-HIGH or
Active-LOW operation) registers. The system master can enable the
I/Os as either inputs or outputs by writing to the I/O configuration
bits. The data for each Input or Output is kept in the corresponding
Input or Output register. The polarity of the read register can be
inverted with the Polarity Inversion Register. All registers can be
read by the system master. Although pin-to-pin and I
2
C address
compatible with the PCF8575, software changes are required due to
the enhancements and are discussed in Application Note AN469
The PCA9555 open-drain interrupt output is activated when any
input state differs from its corresponding input port register state and
is used to indicate to the system master that an input state has
changed. The power-on reset sets the registers to their default
values and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the fixed I
2
C address and
allow up to eight devices to share the same I
2
C/SMBus. The fixed
I
2
C address of the PCA9555 is the same as the PCA9554 allowing
up to eight of these devices in any combination to share the same
I
2
C/SMBus.
ORDERING INFORMATION
PACKAGES
TEMPERATURE
RANGE
ORDER CODE
TOPSIDE MARK
DRAWING NUMBER
24-Pin Plastic DIP
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
PCA9555N
PCA9555
SOT101-1
24-Pin Plastic SO
PCA9555D
PCA9555D
SOT137-1
24-Pin Plastic SSOP
PCA9555DB
PCA9555
SOT340-1
24-Pin Plastic TSSOP
PCA9555PW
PCA9555
SOT355-1
24-Pin Plastic HVQFN
Standard packing quantities and other packaging data are available at www.standardproducts.philips.com/packaging.
I
2
C is a trademark of Philips Semiconductors Corporation.
SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I
2
C patent.
PCA9555BS
9555
SOT616-1
相關(guān)PDF資料
PDF描述
PCA9555 16-bit I2C and SMBus I/O port with interrupt
PCA9556 Octal SMBus Registered Interface(八位SM總線寄存接口)
PCA9556PW Octal SMBus Registered Interface
PCA9557 8-bit I2C and SMBus I/0 port with reset
PCA9558 8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C EEPROM and 2 k bit EEPROM
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