- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367809 > PCA9542PW (NXP SEMICONDUCTORS) 2-channel I2C multiplexer and interrupt controller PDF資料下載
參數(shù)資料
| 型號： | PCA9542PW |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 2-channel I2C multiplexer and interrupt controller |
| 中文描述： | 9542 SERIES, 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO14 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 74K |
| 代理商： | PCA9542PW |
Philips Semiconductors
Product specification
PCA9542
2-channel I
2
C multiplexer and interrupt controller
1999 Oct 07
6
Acknowledge
The number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. Each byte of eight bits
is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master generates an
extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down
the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock
pulse, set-up and hold times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of
the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a stop condition.
DATA OUTPUT
BY TRANSMITTER
SCL FROM
MASTER
SW00368
DATA OUTPUT
BY RECEIVER
1
2
8
9
S
START condition
clock pulse for
acknowledgement
acknowledge
not acknowledge
Figure 4. Acknowledgement on the I
2
C-bus
1
1
0
A2
A1 A0
slave address
fixed
hardware selectable
SW00453
1
Figure 5. Slave address
1
2
SCL
SDA
3
4
5
6
7
8
SDA
S
0
A
A
1
1
1
0
A2
A1 A0
SLAVE ADDRESS
start condition
R/W
acknowledge
from slave
acknowledge
from slave
t
pv
NEW CHANNEL
9
B0
X
B1
CONTROL REGISTER
PREVIOUS CHANNEL
INT0
P
SW00480
1
2
3
4
5
6
7
8
9
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
INT1
B2
X
X
Figure 6. WRITE control register
SDA
S
1
A
NA
1
1
1
0
A2 A1 A0
start condition
R/W
acknowledge
from slave
X
B1
CONTROL REGISTER
P
stop condition
last byte
SW00481
SLAVE ADDRESS
no acknowledge
from master
B0
INT0
INT1
B2
X
X
Figure 7. READ control register
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCA9542PWDH | 2-channel I2C multiplexer and interrupt controller |
| PCA9543 | 2-channel I2C switch with interrupt logic and reset |
| PCA9543D | 2-channel I2C switch with interrupt logic and reset |
| PCA9543PW | 2-channel I2C switch with interrupt logic and reset |
| PCA9544D | BUS CONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCA9542PWDH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-channel I2C multiplexer and interrupt controller |
| PCA9543 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-channel I2C switch with interrupt logic and reset |
| PCA9543A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-channel I2C-bus switch with interrupt logic and reset |
| PCA9543A_09 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-channel I2C-bus switch with interrupt logic and reset |
| PCA9543AD | 功能描述:多路器開關(guān) IC 2Ch I2C-Bus Switch RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時間（最大值）: 關(guān)閉時間（最大值）: 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。