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參數(shù)資料
| 型號： | PCA9540B |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 2-channel I2C multiplexer |
| 中文描述： | 2通道的I2C多路復(fù)用器 |
| 文件頁數(shù)： | 6/14頁 |
| 文件大?。?/td> | 138K |
| 代理商： | PCA9540B |
Philips Semiconductors
Product data sheet
PCA9540B
2-channel I
2
C multiplexer
2004 Sep 29
6
Acknowledge
The number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. Each byte of eight bits
is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master generates an
extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down
the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock
pulse, set-up and hold times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of
the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a stop condition.
DATA OUTPUT
BY TRANSMITTER
SCL FROM
MASTER
SW00368
DATA OUTPUT
BY RECEIVER
1
2
8
9
S
START condition
clock pulse for
acknowledgement
acknowledge
not acknowledge
Figure 9. Acknowledgement on the I
2
C-bus
SDA
S
0
A
A
1
1
1
0
0
0
0
SLAVE ADDRESS
start condition
R/W
acknowledge
from slave
acknowledge
from slave
B0
X
X
X
B1
CONTROL REGISTER
P
SW00800
B2
X
X
Figure 10. WRITE control register
SDA
S
1
A
NA
1
1
1
0
0
0
0
start condition
R/W
acknowledge
from slave
X
X
B1
CONTROL REGISTER
P
stop condition
last byte
SW00499
SLAVE ADDRESS
no acknowledge
from master
B0
B2
X
X
X
Figure 11. READ control register
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| PCA9540BD,112 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 I2C MUX 2CH BI-DIR RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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| PCA9540BD112 | 制造商:NXP Semiconductors 功能描述:IC 2CH I2C BUS MULTIPLEXER 5.5V SOIC-8 |
| PCA9540BDP | 制造商:NXP Semiconductors 功能描述:IC MUX 2CH I2C 8TSSOP 制造商:NXP Semiconductors 功能描述:IC, MUX, 2CH, I2C, 8TSSOP 制造商:NXP Semiconductors 功能描述:IC, MUX, 2CH, I2C, 8TSSOP; No. of Circuits:1; Supply Current:20A; On State Resistance Max:31ohm; Supply Voltage Range:2.3V to 5.5V; Analogue Switch Case Style:TSSOP; No. of Pins:8; Multiplexer Configuration:2:1; Operating ;RoHS Compliant: Yes |
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