參數(shù)資料
型號： PCA84C646
廠商： NXP Semiconductors N.V.
英文描述： Microcontrollers for TV tuning control and OSD applications(應用于TV調(diào)頻和OSD的微控制器)
中文描述： 微控制器的控制和調(diào)整（應用于電視調(diào)頻和OSD的微控制器應用的電視OSD）
文件頁數(shù)： 28/72頁
文件大小： 564K
代理商： PCA84C646
1995 Jun 15
28
Philips Semiconductors
Preliminary specification
Microcontrollers for TV tuning
control and OSD applications
PCA84C646; PCA84C846
12.4
Derivative Register 34 (CON4)
This register selects the 4 display modes(Mode 0 to Mode 3); the active state of HSYNC and VSYNC and the output
polarity of the FB and VOW0 to VOW2 outputs. It also enables/disables the OSD clock (f
OSD
).
Table 30
Derivative Register 34
Table 31
Description of Derivative Register 34 bits
Table 32
Selection of Display Modes
7
6
5
4
3
2
1
0
S1
S0
Hp
Vp
Bp
EN
BIT
SYMBOL
S1
S0
Hp
DESCRIPTION
7
6
5
4
3
These two bits are reserved.
Display mode select bits; see Table 32.
HSYNC signal polarity control bit (see Fig.19).
When Hp = 1; the active level of HSYNC is HIGH.
When Hp = 0; the active level of HSYNC is LOW (default state).
VSYNC signal polarity control bit (see Fig.19).
When Vp = 1; the active level of VSYNC is HIGH.
When Vp = 0; the active level of VSYNC is LOW (default state).
Output polarity control bit for FB, VOW0, VOW1 and VOW2 (see Fig.20).
When Bp = 1; the polarity of FB, VOW0, VOW1 and VOW2 is HIGH (default state).
When Bp = 0; the polarity of FB, VOW0, VOW1 and VOW2 is LOW.
OSD clock enable/disable bit.
When EN = 1; the OSD clock is enabled.
When EN = 0; the OSD clock is disabled.
2
Vp
1
Bp
0
EN
S1
S0
DISPLAY MODE
0
0
Mode 0 No background mode (see Fig.21). The OSD fonts/characters are directly superimposed on
the TV video signals.
Mode 1 North-west shadowing mode (see Fig.22). Available only in the character size 2V/2H or 4V/4H
(V: horizontal line; H: OSD clock).The shadows of the characters are generated by placing a
light source on the North-west 45 degree direction (see also Figs 25 and 26). When designing
the character bit pattern, care must be taken that the shadows generated by this mode is only
within the cell boundary in vertical direction (see Figs 28 and 29 for details). But shadows
generated by this mode in horizontal direction has no boundary limitation (Fig.30).
Mode 2 Box shadowing mode (see Fig.23). Box shadowing is to surround the character font by a
12
×
18 dots box in background, i.e. within the character font cell; locations with no foreground
dots are filled with background dots (see Fig.27).
Mode 3 Frame shadowing mode (raster blanking; see Fig.24); background colour displayed on full
screen where no bit patterns are on.The background colour is controlled by Derivative Register
37 and has 8 different colours; see Table 39.
0
1
1
0
1
1
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