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參數(shù)資料
| 型號(hào)： | PCA84C444 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-bit microcontrollers with OSD and VST(帶OSD 和 VST的8位微控制器) |
| 中文描述： | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PDIP42 |
| 文件頁(yè)數(shù)： | 8/40頁(yè) |
| 文件大?。?/td> | 233K |
| 代理商： | PCA84C444 |
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1996 Nov 29
8
Philips Semiconductors
Product specification
8-bit microcontrollers with OSD and VST
84C44X; 84C64X; 84C84X
7
RESET
The RESET pin (active LOW input) is used to initialize the
microcontroller to a defined state. The Reset configuration
is shown in Fig.5.
Fig.4 External components for RESET pin.
andbook, halfpage
VSS
DD
V
R
≤
100 k
C
RESET
MCD174
7.1
Power-on-reset
The Power-on-reset circuit monitors the voltage level of
V
DD
. If V
DD
remains below the internal reference voltage
level V
ref
(typically 1.3 V), the oscillator is inhibited.
When V
DD
rises above V
ref
, the oscillator is released and
the internal reset is active for a period of t
d
(typically
50
μ
s).
Considering the V
DD
rise time, the following measures for
a correct Power-on-reset can be taken:
If the V
DD
rises above the minimum operation voltage
before time period t
d
is exceeded, no external
components are necessary (see Fig.6).
If V
DD
has a slow rise time, such that after the time
period (t
Vref
+ t
d
) has elapsed the supply voltage is still
below the minimum operation voltage (V
min
),
external components are required (see Figs 4 and 7).
To guarantee a correct reset operation, ensure that the
time constant RC
≥
8
×
t
VDD
.
A definite Power-on-reset can be realized by applying an
(external) RESET signal during power-on.
Fig.5 Reset configuration.
handbook, full pagewidth
MLA651
VSS
DD
V
RESET
POWER-ON-RESET
oscillator
inhibit
ref
V
internal
reset
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