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參數(shù)資料
| 型號： | PCA84C444 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-bit microcontrollers with OSD and VST(帶OSD 和 VST的8位微控制器) |
| 中文描述： | 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PDIP42 |
| 文件頁數(shù)： | 25/40頁 |
| 文件大?。?/td> | 233K |
| 代理商： | PCA84C444 |
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1996 Nov 29
25
Philips Semiconductors
Product specification
8-bit microcontrollers with OSD and VST
84C44X; 84C64X; 84C84X
12.6.3
D
ERIVATIVE REGISTERS
LINE 1A
AND
LINE 1B
Table 17
Derivative register LINE 1A (address 44H)
Table 18
Description of LINE 1A bits
Table 19
Derivative register LINE 1B (address 45H)
Table 20
Description of LINE 1B bits
REGISTER
FUNCTION
LINE 1A
LINE 1B
Determine the character size and vertical position of Row 1 (the second display row).
Determine the horizontal position of Row 1 and the selection of background and blanking functions.
7
6
5
4
3
2
1
0
SZ11
SZ10
VP15
VP14
VP13
VP12
VP11
VP10
BIT SYMBOL
DESCRIPTION
7
6
5
4
3
2
1
0
SZ11
SZ10
VP15
VP14
VP13
VP12
VP11
VP10
Character size.
The state of these two bits enable one of four possible character sizes to be
selected for Row 1. Character sizes include background. See Table 23.
Vertical position control.
The vertical position of Row 1 is selected by the state of the 6 bits, VP10 to VP15.
For details see Section 12.7.1 “Vertical position”.
7
6
5
4
3
2
1
0
BLK1
VB1
HP15
HP14
HP13
HP12
HP11
HP10
BIT SYMBOL
DESCRIPTION
7
BLK1
Blanking.
This bit enables or disables the character display. When BLK1 is:
Logic 0, the outputs VOW1, VOW2, VOW3 and VOB are disabled; no characters are displayed.
Logic 1, the outputs VOW1, VOW2, VOW3 and VOB are enabled; characters are displayed.
Background
. This bit determines whether the background display is selected or not.
The visual effect of background versus no background is shown in Fig.26. When VB1 is set to:
Logic 1, the characters in this line are displayed with background.
Logic 0, the background is disabled and only the character is displayed.
Horizontal position control
.
These 6 bits determine the start position of Row 1.
The horizontal position control is only active during OSDC clock cycles.
For details Section 12.7.2 “Horizontal position” and Fig.25.
6
VB1
5
4
3
2
1
0
HP15
HP14
HP13
HP12
HP11
HP10
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