參數(shù)資料
型號(hào): PC9S08QE64CLH
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 20/50頁(yè)
文件大小: 0K
描述: MCU 8BIT 64K FLASH 64-LQFP
標(biāo)準(zhǔn)包裝: 160
系列: S08
核心處理器: S08
芯體尺寸: 8-位
速度: 50MHz
連通性: I²C,LIN,SCI,SPI
外圍設(shè)備: LVD,PWM,WDT
輸入/輸出數(shù): 54
程序存儲(chǔ)器容量: 64KB(64K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 22x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 托盤
Electrical Characteristics
MC9S08QE128 Series Data Sheet, Rev. 7
Freescale Semiconductor
27
3.10.3
SPI Timing
Table 15 and Figure 21 through Figure 24 describe the timing requirements for the SPI system.
Table 15. SPI Timing
No.
C
Function
Symbol
Min
Max
Unit
—D
Operating frequency
Master
Slave
fop
fBus/2048
0
fBus/2
fBus/4
Hz
1D
SPSCK period
Master
Slave
tSPSCK
2
4
2048
tcyc
2D
Enable lead time
Master
Slave
tLead
1
/2
1
tSPSCK
tcyc
3D
Enable lag time
Master
Slave
tLag
1
/2
1
tSPSCK
tcyc
4D
Clock (SPSCK) high or low time
Master
Slave
tWSPSCK
tcyc – 30
1024 tcyc
ns
5D
Data setup time (inputs)
Master
Slave
tSU
15
ns
6D
Data hold time (inputs)
Master
Slave
tHI
0
25
ns
7
D Slave access time
ta
—1
tcyc
8
D Slave MISO disable time
tdis
—1
tcyc
9D
Data valid (after SPSCK edge)
Master
Slave
tv
25
ns
10
D
Data hold time (outputs)
Master
Slave
tHO
0
ns
11
D
Rise time
Input
Output
tRI
tRO
tcyc – 25
25
ns
12
D
Fall time
Input
Output
tFI
tFO
tcyc – 25
25
ns
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