參數(shù)資料
型號(hào): PC33730EK/R2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 電源管理
英文描述: POWER SUPPLY SUPPORT CKT, PDSO32
封裝: 0.65 MM PITCH, ROHS COMPLIANT, SOIC-32
文件頁(yè)數(shù): 23/27頁(yè)
文件大小: 716K
代理商: PC33730EK/R2
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
33730
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
Symbol
Value
Unit
Supply Voltage (VBAT)
VBAT
-0.3 to +40
V
Keep-Alive Supply Voltage (KA_VBAT)
KA_VBAT
-18 to +40
V
Control Inputs (VIGN, P1, P2, P3), PFD Output
-18 to +40
V
Bootstrap Voltage (BOOT, SR) referenced to ground
VBOOT
-0.3 to +50
V
Bootstrap Voltage (BOOT, SR) referenced to SW
VBOOT - VSW
-0.3 to +12
V
Charge Pump Output Voltage (CP)
VCP
-0.3 to +12
V
Switch Node Voltage SW
VSW
-2.0 to +40
V
Sensor Supplies (VREF1, VREF2)
VREF
-1.0 to +26.5
V
Regulator Voltages (VDDH,VDD3, VDD3_B, VDDL,VDDL_B, VKAM)
VREG
-0.3 to +7.0
V
Open Drain Outputs (RSTH, RSTL, RST3, RSTKAM, IGN_ON), REGON
VDD
-0.3 to +7.0
V
Analog Inputs (VCOMP, INV, FREQ, HRT)
VIN
-0.3 to +3.0
V
Human Body Model (HBM)
Machine Model (MM)
Charge Device Model (CDM)
Corner Pins (1, 16, 17, 32)
All Other Pins
VESD
±2000
±200
±750
±500
V
Operational Package Temperature (Ambient Temperature)
TA_MAX
-40 to +125
°C
Storage Temperature
TSTO
-65 to +150
°C
Peak Package Reflow Temperature During Reflow(2), (3)
TPPRT
°C
Maximum Junction Temperature
TJ_MAX
150
°C
Thermal Resistance, Junction to Ambient(4)
J-A
41
°C/W
Thermal Resistance, Junction to Case(5)
J-C
1.2
°C/W
Notes
1.
ESD testing is performed in accordance with the Human Body Model (HBM) (AEC-Q100-2), the Machine Model (MM) (AEC-Q100-003),
RZAP = 0Ω), and the Charge Device Model (CDM), Robotic (AEC-Q100-011).
2.
Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
4.
Thermal resistance measured in accordance with EIA/JESD51-2.
5.
Theoretical thermal resistance from the die junction to the exposed pad.
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