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參數(shù)資料
| 型號： | PC33730EK/R2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PDSO32 |
| 封裝： | 0.65 MM PITCH, ROHS COMPLIANT, SOIC-32 |
| 文件頁數(shù)： | 11/27頁 |
| 文件大?。?/td> | 716K |
| 代理商： | PC33730EK/R2 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
19
33730
FUNCTIONAL DEVICE OPERATION
OPERATION DESCRIPTION
REGON
The REGON feature permits the microcontroller to select
a delayed shutdown of the 33730. It holds off the activation of
the reset signals to the microcontroller after the VIGN signal
has transitioned. This allows the microcontroller to control the
power up and power down of the main regulator outputs
except for the standby supplies. The REGON pin input
threshold voltages allow control by the standard 2.5V (up to
5V) logic ICs.
HARDWARE RESETS (RSTL, RST3, RSTH, and
RSTKAM)
The Hardware Resets are open drain, active low outputs
capable of sinking 5mA current and able to withstand +7.0V.
The RSTL control circuit monitors the VDDL output. If the
VDDL output is out of regulation (low), the device will assert
the RSTL signal low.
The RST3 control circuit monitors the VDD3 output. If the
VDD3 output is out of regulation (low), the device will assert
the RST3 signal low.
The RSTH control circuit monitors the VDDH output. If the
VDDH output is out of regulation (low or high), the device will
assert the RSTH signal low.
The RSTKAM control circuit monitors the VKAM output. If
the VKAM output is out of regulation (low), the device will
assert the RSTH signal low.
All Reset monitoring circuits have a 20
μs delay filter to
avoid unintended resets caused by noise glitches on the
regulator output lines.
HR TIMER
The HR (Hardware Reset) Timer provides the delay
between the time when the particular regulator output voltage
is in regulation and the release of the Reset signal. This delay
can be programmed by a single external resistor. This
solution provides better accuracy than the commonly used
external RC timer. The HR Timer delay can be programmed
in eight 8ms steps from 0 to 56ms (see Table 7)
.
Figure 6. Battery Voltage Ramp Up
Table 7. HR Timer Delay Programming
Programming Resistor
Value RHRT [ohms]
Delay (typ.)
[ms]
68k
0
33k
8
16k
16
8.2k
24
3.9k
32
2.0k
40
1.0k
48
470
56
V
KAM
=1. 0V
Batt ery
Voltage
RSTKAM
POR Delay
RST L, RST 3
POR Delay
4.5V
RSTH
POR Delay
VDDL =VDD3 =3.3V
VDDH =5.0 V
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