參數(shù)資料
型號(hào)： PC28F640J3C-115
廠商： INTEL CORP
元件分類： PROM
英文描述： Intel StrataFlash Memory (J3)
中文描述： 4M X 16 FLASH 2.7V PROM, 115 ns, PBGA64
封裝： LEAD FREE, BGA-64
文件頁數(shù)： 67/72頁
文件大?。?/td> 905K
代理商： PC28F640J3C-115
256-Mbit J3 (x8/x16)
Datasheet
67
Figure 26. Protection Register Programming Flowchart
Start
Write C0H
(Protection Reg.
Program Setup)
Write Protect. Register
Address/Data
Read Status Register
SR.7 = 1
Full Status
Check if Desired
Program Complete
Read Status Register
Data (See Above)
V
PEN
Range Error
Protection Register
Programming Error
Attempted Program to
Locked Register -
Aborted
Program Successful
SR.3, SR.4 =
SR.1, SR.4 =
SR.1, SR.4 =
FULL STATUS CHECK PROCEDURE
Bus Operation
Write
Write
Standby
Protection Program operations can only be addressed within the protection
register address space. Addresses outside the defined space will return an
error.
Repeat for subsequent programming operations.
SR Full Status Check can be done after each program or after a sequence of
program operations.
Write FFH after the last program operation to reset device to read array mode.
Bus Operation
Standby
Standby
SR.3 MUST be cleared, if set during a program attempt, before further
attempts are allowed by the Write State Machine.
SR.1, SR.3 and SR.4 are only cleared by the Clear Staus Register Command,
in cases of multiple protection register program operations before full status is
checked.
If an error is detected, clear the status register before attempting retry or other
error recovery.
No
Yes
1, 1
0,1
1,1
Command
Protection Program
Setup
Protection Program
Comments
Data = C0H
Data = Data to Program
Addr = Location to Program
Check SR.7
1 = WSM Ready
0 = WSM Busy
Command
Comments
SR.1 SR.3 SR.4
0 1 1 V
PEN
Low
0 0 1 Prot. Reg.
Prog. Error
1 0 1 Register
Locked:
Aborted
Read
Status Register Data Toggle
CE# or OE# to Update Status
Register Data
Standby
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