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參數(shù)資料
| 型號(hào)： | PC28F640J3C-115 |
| 廠商： | INTEL CORP |
| 元件分類(lèi)： | PROM |
| 英文描述： | Intel StrataFlash Memory (J3) |
| 中文描述： | 4M X 16 FLASH 2.7V PROM, 115 ns, PBGA64 |
| 封裝： | LEAD FREE, BGA-64 |
| 文件頁(yè)數(shù)： | 5/72頁(yè) |
| 文件大?。?/td> | 905K |
| 代理商： | PC28F640J3C-115 |
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Datasheet
5
Contents
Revision History
Date of
Revision
Version
Description
07/07/99
-001
Original Version
08/03/99
-002
A
0
–A
2
indicated on block diagram
Changed Minimum Block Erase time,I
OL
, I
OH
, Page Mode and Byte Mode
currents. Modified RP# on
AC Waveform for Write Operations
09/07/99
-003
12/16/99
-004
Changed Block Erase time and t
AVWH
Removed all references to 5 V I/O operation
Corrected
Ordering Information
, Valid Combinations entries
Changed Min program time to 211 μs
Added DU to Lead Descriptions table
Changed Chip Scale Package to Ball Grid Array Package
Changed default read mode to page mode
Removed erase queuing from Figure 10,
Block Erase Flowchart
03/16/00
-005
Added Program Max time
Added Erase Max time
Added Max page mode read current
Moved tables to correspond with sections
Fixed typographical errors in ordering information and DC parameter table
Removed V
CCQ1
setting and changed V
CCQ2/3
to V
CCQ1/2
Added recommended resister value for STS pin
Change operation temperature range
Removed note that rp# could go to 14 V
Removed V
OL
of 0.45 V; Removed V
OH
of 2.4 V
Updated I
CCR
Typ values
Added Max lock-bit program and lock times
Added note on max measurements
06/26/00
-006
Updated cover sheet statement of 700 million units to one billion
Corrected Table 10 to show correct maximum program times
Corrected error in Max block program time in section 6.7
Corrected typical erase time in section 6.7
2/15/01
-007
Updated cover page to reflect 100K minimum erase cycles
Updated cover page to reflect 110 ns 32M read speed
Removed Set Read Configuration command from Table 4
Updated Table 8 to reflect reserved bits are 1-7; not 2-7
Updated Table 16 bit 2 definition from R to PSS
Changed V
Max voltage from 0.8 V to 2.0 V, Section 6.4,
DC
Characteristics
Updated 32Mbit Read Parameters R1, R2 and R3 to reflect 110ns, Section 6.5,
AC Characteristics–Read-Only Operations
Updated write parameter W13 (t
WHRL
) from 90 ns to 500 ns, Section 6.6,
AC
Characteristics–Write Operations
Updated Max. Program Suspend Latency W16 (t
) from 30 to 75 μs,
Block Erase, Program, and Lock-Bit Configuration Performance
(1,2,3)
04/13/01
-008
Revised Section 7.0,
Ordering Information
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| PC28F640J3C120 | 制造商:Intel 功能描述: |
| PC28F640J3C-120 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel StrataFlash Memory (J3) |
| PC28F640J3C-125 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel StrataFlash Memory (J3) |
| PC28F640J3C-150 | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:Intel StrataFlash Memory (J3) |
| PC28F640J3D75 | 制造商:Intel 功能描述: |
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