參數(shù)資料
型號(hào): PC28F640J3A-150
廠商: Intel Corp.
英文描述: Intel StrataFlash Memory (J3)
中文描述: 英特爾StrataFlash存儲(chǔ)器(J3)
文件頁(yè)數(shù): 54/72頁(yè)
文件大?。?/td> 905K
代理商: PC28F640J3A-150
256-Mbit J3 (x8/x16)
54
Datasheet
A.3
Block Status Register
The block status register indicates whether an erase operation completed successfully or whether a
given block is locked or can be accessed for flash program/erase operations.
A.4
CFI Query Identification String
The CFI Query Identification String provides verification that the component supports the
Common Flash Interface specification.
It also indicates the specification version and supported
vendor-specified command set(s).
Table 25. Query Structure
Offset
Sub-Section Name
Description
Notes
00h
01h
Manufacturer Code
Device Code
Block-Specific Information
Reserved for Vendor-Specific Information
Reserved for Vendor-Specific Information
Command Set ID and Vendor Data Offset
Flash Device Layout
Vendor-Defined Additional Information
Specific to the Primary Vendor Algorithm
1
1
(BA+2)h
(2)
04-0Fh
10h
1Bh
27h
Block Status Register
Reserved
CFI Query Identification String
System Interface Information
Device Geometry Definition
Primary Intel-Specific Extended
Query Table
1,2
1
1
1
1
P
(3)
1,3
NOTES:
1. Refer to the Query Structure Output section and offset 28h for the detailed definition of offset
address as a function of device bus width and mode.
2. BA = Block Address beginning location (i.e., 02000h is block 2’s beginning location when the
block size is 128 Kbyte).
3. Offset 15 defines “P” which points to the
Primary Intel-Specific Extended Query
Table.
Table 26. Block Status Register
Offset
(BA+2)h
(1)
Length
1
Description
Address
BA+2:
Value
--00 or --01
Block Lock Status Register
BSR.0 Block Lock Status
0 = Unlocked
1 = Locked
BSR 1–7:
Reserved for Future Use
BA+2:
(bit 0): 0 or 1
BA+2:
(bit 1–7): 0
NOTE:
1. BA = The beginning location of a Block Address (i.e., 008000h is block 1’s (64-KB block) beginning location
in word mode).
Table 27. CFI Identification (Sheet 1 of 2)
Offset
Length
Description
Add.
Hex
Code
--51
--52
--59
--01
--00
--31
--00
--00
Value
10h
3
Query-unique ASCII string “QRY”
10
11:
12:
13:
14:
15:
16:
17:
“Q”
“R”
“Y”
13h
2
Primary vendor command set and control interface ID code.
16-bit ID code for vendor-specified algorithms
Extended Query Table primary algorithm address
15h
2
17h
2
Alternate vendor command set and control interface ID code.
相關(guān)PDF資料
PDF描述
PC28F640J3C-120 Intel StrataFlash Memory (J3)
PC28F256J3C-115 Intel StrataFlash Memory (J3)
PC28F128J3C-115 Intel StrataFlash Memory (J3)
PC28F640J3C-115 Intel StrataFlash Memory (J3)
PC28F320J3C-115 Intel StrataFlash Memory (J3)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PC28F640J3C-110 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Memory (J3)
PC28F640J3C115 制造商:Rochester Electronics LLC 功能描述:- Bulk
PC28F640J3C-115 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Memory (J3)
PC28F640J3C120 制造商:Intel 功能描述:
PC28F640J3C-120 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Memory (J3)