參數(shù)資料
型號(hào): PALCE16V8Z-12JI
廠商: LATTICE SEMICONDUCTOR CORP
元件分類(lèi): PLD
英文描述: EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic
中文描述: EE PLD, 12 ns, PQCC20
封裝: PLASTIC, LCC-20
文件頁(yè)數(shù): 28/32頁(yè)
文件大?。?/td> 635K
代理商: PALCE16V8Z-12JI
PALCE16V8 and PALCE16V8Z Families
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DESIGNS
Programmable Output Polarity
The polarity of each macrocell can be active-high or active-low, either to match output signal
needs or to reduce product terms. Programmable polarity allows Boolean expressions to be
written in their most compact form (true or inverted), and the output can still be of the desired
polarity. It can also save “DeMorganizing” efforts.
Selection is through a programmable bit SL1x which controls an exclusive-OR gate at the output
of the AND/OR logic. The output is active high if SL1x is 1 and active low if SL1x is 0.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PALCE16V8Z-12PI 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic
PALCE16V8Z-15JC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD
PALCE16V8Z-15JI 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic
PALCE16V8Z-15PC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Electrically-Erasable PLD
PALCE16V8Z-15PI 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic