參數(shù)資料
型號(hào): PALCE16V8H-5JC/5
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic
中文描述: EE PLD, 5 ns, PQCC20
封裝: PLASTIC, LCC-20
文件頁數(shù): 28/32頁
文件大?。?/td> 635K
代理商: PALCE16V8H-5JC/5
PALCE16V8 and PALCE16V8Z Families
5
USE
GAL
DEVICES
FOR
NEW
DESIGNS
Programmable Output Polarity
The polarity of each macrocell can be active-high or active-low, either to match output signal
needs or to reduce product terms. Programmable polarity allows Boolean expressions to be
written in their most compact form (true or inverted), and the output can still be of the desired
polarity. It can also save “DeMorganizing” efforts.
Selection is through a programmable bit SL1x which controls an exclusive-OR gate at the output
of the AND/OR logic. The output is active high if SL1x is 1 and active low if SL1x is 0.
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