參數(shù)資料
型號(hào): PALC22V10-25JI
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: PLD
英文描述: Flash-erasable Reprogrammable CMOS PAL Device
中文描述: OT PLD, 25 ns, PQCC28
封裝: PLASTIC, LCC-28
文件頁數(shù): 7/13頁
文件大?。?/td> 367K
代理商: PALC22V10-25JI
PALCE22V10
USE ULTRA37000
TM
FOR
ALL NEW DESIGNS
Document #: 38-03027 Rev. *B
Page 7 of 13
f
MAX3
Internal Feedback Maximum
Frequency (1/(t
CF
+ t
S
))
[6, 13]
Register Clock to
Feedback Input
[6, 14]
Asynchronous Reset Width
Asynchronous Reset
Recovery Time
Asynchronous Reset to
Registered Output Delay
Synchronous Preset
Recovery Time
Power-up Reset Time
[6, 15]
111
68.9
32.2
MHz
t
CF
3
4.5
13
ns
t
AW
t
AR
10
6
15
12
25
25
ns
ns
t
AP
12
20
25
ns
t
SPR
8
20
25
ns
t
PR
Switching Waveforms
1
1
1
μ
s
Power-Up Reset Waveform
[15]
Military and Industrial Switching Characteristics PALCE22V10
(continued)
[2, 7]
Parameter
Description
22V10-10
Min.
22V10-15
Min.
22V10-25
Min.
Unit
Max.
Max.
Max.
t
S
t
H
t
WL
t
WH
t
P
t
SPR
t
AR
t
AW
t
AP
t
CO
t
PD
t
ER
t
EA
t
ER
t
EA
INPUTS I/O,
REGISTERED
FEEDBACK
SYNCHRONOUS
PRESET
CP
ASYNCHRONOUS
RESET
REGISTERED
OUTPUTS
COMBINATORIAL
OUTPUTS
[10]
[10]
[9]
[9]
t
PR
POWER
CLOCK
t
S
t
WL
10%
REGISTERED
ACTIVE LOW
OUTPUTS
SUPPLY VOLTAGE
t
PR
MAX= 1
μ
s
90%
V
CC
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