參數(shù)資料
型號: PAK-II
廠商: Electronic Theatre Controls, Inc.
英文描述: 310 Ivy Glen Court
中文描述: 310常春藤格倫法院
文件頁數(shù): 10/28頁
文件大?。?/td> 155K
代理商: PAK-II
state.
You can get the same result by bringing the enable
pin low and then returning it to high to enable the
Pak II. This is useful if you are connecting more
than one Pak to the same data and clock lines.
You'll need to use the enable pin then anyway, and
it makes sure that the selected Pak is always in a
known state. Using the data sequence method may
be unreliable when using multiple Paks together.
Finally, you can force a hardware reset by bringing
the reset pin low. This might be useful if your
circuit generates a hardware reset signal based on a
brown-out detector or other master reset circuit.
Normally, you'll just connect the reset pin to the
+5V supply and allow the Pak II to reset itself on
power up. If you do want to drive this pin, make
sure that it is at 5V for normal operation. You can
use a reset switch or other device if you pull up the
reset pin with a 10K-22K resistor.
Communications
There are several schemes you can use to
communicate with the Pak II. All of them revolve
around a synchronous protocol involving a clock
pin and 1 or 2 data pins. Data is shifted most
significant bit first, and samples at the rising edge
of the clock. All signals are positive logic (that is,
a 1 is a high logic level). The Pak II exposes a
separate input (SIN) and output (SOUT) pins for
hosts that can't easily handle bi-directional I/O
lines. However, for hosts like the Stamp or PIC, it
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