參數(shù)資料
型號： P8XCE598
廠商： NXP Semiconductors N.V.
英文描述： 8-bit microcontroller with on-chip CAN
中文描述： 8位微控制器芯片的CAN
文件頁數(shù)： 8/108頁
文件大?。?/td> 507K
代理商： P8XCE598
1996 Jun 27
8
Philips Semiconductors
Product specification
8-bit microcontroller with on-chip CAN
P8xCE598
Table 1
Pin description for
single function
pins (SOT318-1 and SOT351-1; see note 1)
Notes
1.
2.
3.
To avoid a ‘latch up’ effect at power-on: V
SS
0.5 V < ‘voltage on any pin at any time’ < V
DD
+ 0.5 V.
Triggered by a rising edge. ADC operation can also be started by software.
RST also provides a reset pulse as output when timer T3 overflows or after a CAN wake-up from Power-down.
SYMBOL PIN
DESCRIPTION
V
DD1
V
DD2
V
DD3
V
DD4
STADC
PWM0
PMW1
EW
14
28
53
76
15
16
17
18
Power supply, digital part:
for internal logic (CPU, Timers/counters, Memory, CAN, UART, ADC).
Power supply, digital part:
for Port 1, Port 3, Port 4, PWM0 and PWM1 outputs.
Power supply, digital part:
for the on-chip oscillator.
Power supply, digital part:
for Port 0, Port 2, ALE output and PSEN output.
Start ADC operation.
Input starting analog-to-digital conversion (note 2). This pin must not float.
Pulse width modulation
output 0.
Pulse width modulation
output 1.
Enable Watchdog Timer (WDT):
enable for T3 Watchdog Timer and disable Power-down mode.
This pin must not float.
Reset:
input to reset the P8xCE598 (note 3).
Ground
potential for the CAN transmitter outputs.
Power supply
(+5V) for the CAN transmitter outputs.
Crystal pin 2:
output of the inverting amplifier that forms the oscillator.
When an external clock oscillator is used this pin is left open-circuit.
Crystal pin 1:
input to the inverting amplifier that forms the oscillator, and input to the internal clock
generator. Receives the external clock oscillator signal, when an external oscillator is used.
Ground, digital part:
for internal logic (CPU, Timers/Counters, Memory, CAN, UART, ADC).
Ground, digital part:
for Port 1, Port 3 and Port 4, and PWM0 and PWM1 outputs.
Ground, digital part:
for the on-chip oscillator.
Ground, digital part:
for the Port 0, Port 2, ALE output and PSEN output.
Program Store Enable:
Read strobe to external Program Memory (active LOW).
Drive: 8
×
LSTTL inputs.
Address Latch Enable:
latches the Low-byte of the address during accesses to external memory
(note 4). Drive: 8
×
LSTTL inputs; handles CMOS inputs without an external pull-up.
External Access input.
See note 5.
1
2
AV
DD
reference voltage
output respectively input (note 6).
Inputs from the CAN-bus line
to the differential input comparator of the on-chip CAN-controller
(note 7).
RST
CV
SS
CV
DD
XTAL2
30
37
40
51
XTAL1
52
V
SS1
V
SS2
V
SS3
V
SS4
PSEN
13
29
54
77
63
ALE
64
EA
REF
CRX1
CRX0
AV
REF
AV
REF+
AV
SS
AV
DD
n.c.
65
78
79
80
1
2
3
4
23,
49,
50,
66,
67
Low-end of ADC
(analog-to-digital conversion) reference resistor.
High-end of ADC
(analog-to-digital conversion) reference resistor (note 8).
Ground, analog part.
For ADC, CAN receiver and reference voltage.
Power supply, analog part
(+5 V). For ADC, CAN receiver and reference voltage.
No connection
.
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