參數(shù)資料
型號： P8XC151SA
廠商： Intel Corp.
英文描述： HIGH-PERFORMANCE CHMOS MICROCONTROLLER
中文描述： 高性能CHMOS單片機(jī)
文件頁數(shù)： 11/33頁
文件大?。?/td> 312K
代理商： P8XC151SA
8XC151SA/SB HIGH-PERFORMANCE CHMOS MICROCONTROLLER
Table 7. Signal Descriptions
(Continued)
Signal
Name
Type
Description
Multiplexed
With
V
SS
GND
Circuit Ground.
Connect this pin to ground.
D
V
SS1
GND
Secondary Ground.
This ground is provided to reduce ground bounce
and improve power supply bypassing. Connection of this pin to ground
is recommended. However, when using the 8XC151SA/SB as a pin-
for-pin replacement for the 8XC51BH, V
SS1
can be unconnected
without loss of compatibility. (Not available on DIP)
V
SS2
GND
Secondary Ground 2.
This ground is provided to reduce ground
bounce and improve power supply bypassing. Connection of this pin to
ground is recommended. However, when using the 8XC151SA/SB as
a pin-for-pin replacement for the 8XC51FX, V
SS2
can be unconnected
without loss of compatibility. (Not available on DIP)
WR
Y
O
Write.
Write signal output to external memory.
P3.6
XTAL1
I
Input to the On-chip, Inverting, Oscillator Amplifier.
To use the
internal oscillator, a crystal/resonator circuit is connected to this pin. If
an external oscillator is used, its output is connected to this pin. XTAL1
is the clock source for internal timing.
XTAL2
O
Output of the On-chip, Inverting, Oscillator Amplifier.
To use the
internal oscillator, a crystal/resonator circuit is connected to this pin. If
an external oscillator is used, leave XTAL2 unconnected.
D
2
The descriptions of A15:8/P2.7:0 and AD7:0/P0.7:0 are for the nonpage-mode chip configuration (compatible with
44-lead PLCC and 40-pin DIP MCS 51 microcontrollers). If the chip is configured for page-mode operation, port 0 carries
the lower address bits (A7:0), and port 2 carries the upper address bits (A15:8) and the data (D7:0).
11
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