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參數(shù)資料
| 型號(hào)： | P89V51RD2FN,112 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 7/80頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC 80C51 MCU FLASH 64K 40-DIP |
| 產(chǎn)品培訓(xùn)模塊： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 標(biāo)準(zhǔn)包裝： | 9 |
| 系列： | 89V |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲(chǔ)器容量： | 64KB（64K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 40-DIP（0.600"，15.24mm） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 706 (CN2011-ZH PDF) |
| 配用： | 622-1017-ND - BOARD 44-ZIF PLCC SOCKET 622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP |
| 其它名稱： | 568-2431-5 935277948112 P89V51RD2FN |
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P89V51RB2_RC2_RD2_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 November 2009
15 of 80
NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
to work during initial power up, before the voltage reaches the brownout detection level.
The POF ag in the PCON register is set to indicate an initial power up condition. The
POF ag will remain active until cleared by software.
Following a power-on or external reset the P89V51RB2/RC2/RD2 will force the SWR and
BSEL bits (FCF[1:0]) = 00. This causes the boot block to be mapped into the lower 8 kB of
code memory and the device will execute the ISP code in the boot block and attempt to
autobaud to the host. If the autobaud is successful the device will remain in ISP mode. If,
after approximately 400 ms, the autobaud is unsuccessful the boot block code will check
to see if the SoftICE ag is set (from a previous programming operation). If the SoftICE
ag is set the device will enter SoftICE mode. If the SoftICE ag is cleared, the boot code
will execute a software reset causing the device to execute the user code from block 0
starting at address 0000H. Note that an external reset applied to the RST pin has the
same effect as a power-on reset.
6.2.3 Software reset
A software reset is executed by changing the SWR bit (FCF.1) from ‘0’ to ‘1’. A software
reset will reset the program counter to address 0000H and force both the SWR and BSEL
bits (FCF[1:0]) = 10. This will result in the lower 8 kB of the user code memory being
mapped into the user code memory space. Thus the user's code will be executed starting
at address 0000H. A software reset will not change WDTC.2 or RAM data. Other SFRs
will be set to their reset values.
6.2.4 Brownout detect reset
The device includes a brownout detection circuit to protect the system from severe supply
voltage uctuations. The P89V51RB2/RC2/RD2's brownout detection threshold is 2.35 V.
When VDD drops below this voltage threshold, the brownout detect triggers the circuit to
generate a brownout interrupt but the CPU still runs until the supplied voltage returns to
the brownout detection voltage VBOD. The default operation for a brownout detection is to
cause a processor reset.
Fig 5.
Power-on reset circuit
002aaa543
VDD
8.2 k
RST
XTAL2
XTAL1
C1
C2
10
F
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| P89V52X2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 low power 8 kB flash microcontroller with 256 B RAM, 192 B data EEPROM |
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| P89V52X2FA,512 | 功能描述:8位微控制器 -MCU 80C51 8K FL / 256 RM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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