參數(shù)資料
型號(hào): P89V51RD2FN,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 11/80頁(yè)
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 64K 40-DIP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 9
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 64KB(64K x 8)
程序存儲(chǔ)器類(lèi)型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 706 (CN2011-ZH PDF)
配用: 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP
其它名稱(chēng): 568-2431-5
935277948112
P89V51RD2FN
P89V51RB2_RC2_RD2_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 November 2009
19 of 80
NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
6.2.8 Dual data pointers
The device has two 16-bit data pointers. The DPTR Select (DPS) bit in AUXR1
determines which of the two data pointers is accessed. When DPS = 0, DPTR0 is
selected; when DPS = 1, DPTR1 is selected. Quickly switching between the two data
pointers can be accomplished by a single INC instruction on AUXR1 (see Figure 7).
Fig 6.
Internal and external data memory structure
000H
2FFH
00H
FFH
UPPER 128 B
INTERNAL RAM
LOWER 128 B
INTERNAL RAM
(INDIRECT AND
DIRECT
ADDRESSING)
(INDIRECT
ADDRESSING)
(DIRECT
ADDRESSING)
SPECIAL
FUNCTION
REGISTERS (SFRs)
80H
FFH
FFFFH
000H
EXTERNAL
DATA
MEMORY
EXTERNAL
DATA
MEMORY
2FFH
0000H
EXTRAM = 0
EXTRAM = 1
EXPANDED RAM
0300H
(INDIRECT
ADDRESSING)
(INDIRECT
ADDRESSING)
(INDIRECT
ADDRESSING)
FFFFH
80H
7FH
002aaa517
EXPANDED
RAM
768 B
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