參數(shù)資料
型號(hào): P89V51RC2FN,112
廠商: NXP Semiconductors
文件頁(yè)數(shù): 40/80頁(yè)
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 32K 40-DIP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 9
系列: 89V
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 32KB(32K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 706 (CN2011-ZH PDF)
配用: 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP
其它名稱: 568-2430-5
935278782112
P89V51RC2FN
P89V51RB2_RC2_RD2_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 November 2009
45 of 80
NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
6.8 Watchdog timer
The device offers a programmable Watchdog Timer (WDT) for fail safe protection against
software deadlock and automatic recovery.
To protect the system against software deadlock, the user software must refresh the WDT
within a user-dened time period. If the software fails to do this periodical refresh, an
internal hardware reset will be initiated if enabled (WDRE = 1). The software can be
designed such that the WDT times out if the program does not work properly.
The WDT in the device uses the system clock (XTAL1) as its time base. So strictly
speaking, it is a Watchdog counter rather than a WDT. The WDT register will increment
every 344064 crystal clocks. The upper 8-bits of the time base register (WDTD) are used
as the reload register of the WDT.
The WDTS ag bit is set by WDT overow and is not changed by WDT reset. User
software can clear WDTS by writing ‘1' to it.
Figure 20 provides a block diagram of the WDT. Two SFRs (WDTC and WDTD) control
WDT operation. During Idle mode, WDT operation is temporarily suspended, and
resumes upon an interrupt exit from idle.
The time-out period of the WDT is calculated as follows:
Period = (255
WDTD) × 344064 × 1/f
CLK(XTAL1)
where WDTD is the value loaded into the WDTD register and fosc is the oscillator
frequency.
Fig 19. SPI transfer format with CPHA = 1
002aaa530
MSB
S
PICLK cycle #
(for reference)
S
PICLK (CPOL = 0)
S
PICLK (CPOL = 1)
MOSI
(from master)
MISO
(from slave)
SS (to slave)
6
12
3
4
5
6
7
8
5
MSB
6543
2
1
LSB
4
3
2
1
LSB
Fig 20. Block diagram of programmable WDT
002aaa531
WDT
UPPER BYTE
WDT reset
internal reset
344064
clks
CLK (XTAL1)
external reset
WDTC
COUNTER
WDTD
相關(guān)PDF資料
PDF描述
P89V51RC2FBC,557 IC 80C51 MCU FLASH 32K 44-TQFP
292303-1 CONN USB RECEPT R/A TYPE A 4POS
VI-B3V-CU-B1 CONVERTER MOD DC/DC 5.8V 200W
VJ1825A562KBCAT4X CAP CER 5600PF 200V 10% NP0 1825
ATSAM3U1EA-AU IC MCU 32BIT 64KB FLASH 144LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P89V51RD2 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM
P89V51RD2BN 制造商:NXP Semiconductors 功能描述:IC MCU 8BIT 80C51 64K FLASH DIP40 制造商:NXP Semiconductors 功能描述:IC, MCU 8BIT 80C51 64K FLASH, DIP40
P89V51RD2BN,112 功能描述:8位微控制器 -MCU 80C51 5V 16/32/64KB FLASH MCU 1 KB RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
P89V51RD2FA 制造商:NXP Semiconductors 功能描述:MCU 8BIT 80C51 64K FLASH PLCC44
P89V51RD2FA,512 功能描述:8位微控制器 -MCU 80C51 64K FL / 1K RM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT