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參數(shù)資料
| 型號： | P89V51RC2FBC,557 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 9/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 80C51 MCU FLASH 32K 44-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 標(biāo)準(zhǔn)包裝： | 800 |
| 系列： | 89V |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 32KB（32K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-TQFP |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 706 (CN2011-ZH PDF) |
| 配用： | 622-1017-ND - BOARD 44-ZIF PLCC SOCKET 622-1001-ND - USB IN-CIRCUIT PROG 80C51ISP |
| 其它名稱： | 568-2429 935277725557 P89V51RC2FBC |
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P89V51RB2_RC2_RD2_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 November 2009
17 of 80
NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
When instructions access addresses in the upper 128 B (above 7FH), the MCU
determines whether to access the SFRs or RAM by the type of instruction given. If it is
indirect, then RAM is accessed. If it is direct, then an SFR is accessed. See the examples
below.
Indirect Access:
MOV@R0, #data; R0 contains 90H
Register R0 points to 90H which is located in the upper address range. Data in ‘#data’ is
written to RAM location 90H rather than port 1.
Direct Access:
MOV90H, #data; write data to P1
Data in ‘#data’ is written to port 1. Instructions that write directly to the address write to the
SFRs.
To access the expanded RAM, the EXTRAM bit must be cleared and MOVX instructions
must be used. The extra 768 B of memory is physically located on the chip and logically
occupies the rst 768 B of external memory (addresses 000H to 2FFH).
When EXTRAM = 0, the expanded RAM is indirectly addressed using the MOVX
instruction in combination with any of the registers R0, R1 of the selected bank or DPTR.
Accessing the expanded RAM does not affect ports P0, P3.6 (WR), P3.7 (RD), or P2.
With EXTRAM = 0, the expanded RAM can be accessed as in the following example.
Expanded RAM Access (Indirect Addressing only):
MOVX@DPTR, A DPTR contains 0A0H
Table 7.
AUXR - Auxiliary register (address 8EH) bit allocation
Not bit addressable; Reset value 00H
Bit
7
6
5
4
3
2
1
0
Symbol
-
EXTRAM
AO
Table 8.
AUXR - Auxiliary register (address 8EH) bit description
Bit
Symbol
Description
7 to 2
-
Reserved for future use. Should be set to ‘0’ by user programs.
1
EXTRAM
Internal/External RAM access using MOVX @Ri/@DPTR. When ‘0’,
core attempts to access internal XRAM with address specied in
MOVX instruction. If address supplied with this instruction exceeds
on-chip available XRAM, off-chip XRAM is going to be selected and
accessed. When ‘1’, every MOVX @Ri/@DPTR instruction targets
external data memory by default.
0
AO
ALE off: disables/enables ALE. AO = 0 results in ALE emitted at a
constant rate of 1
2 the oscillator frequency. In case of AO = 1, ALE is
active only during a MOVX or MOVC.
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| P89V51RC2FN | 制造商:NXP Semiconductors 功能描述:IC MCU 8BIT 80C51 32K FLASH DIP40 |
| P89V51RC2FN,112 | 功能描述:8位微控制器 -MCU 80C51 32K FL / 512 R RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P89V51RC2FN112 | 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 40MHZ DIP-40 |
| P89V51RD2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 64 kB Flash microcontroller with 1 kB RAM |
| P89V51RD2BN | 制造商:NXP Semiconductors 功能描述:IC MCU 8BIT 80C51 64K FLASH DIP40 制造商:NXP Semiconductors 功能描述:IC, MCU 8BIT 80C51 64K FLASH, DIP40 |
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