參數(shù)資料
型號(hào): P89LV51RD2BA
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit 80C51 3 V low power 64 kB Flash microcontroller with 1 kB RAM
中文描述: 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, MS-018, SOT-187-2, LCC-44
文件頁(yè)數(shù): 45/77頁(yè)
文件大小: 349K
代理商: P89LV51RD2BA
Philips Semiconductors
P89LV51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
Product data
Rev. 04 — 02 December 2004
45 of 77
9397 750 14342
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7.7 Watchdog timer
The device offers a programmable Watchdog Timer (WDT) for fail safe protection
against software deadlock and automatic recovery.
To protect the system against software deadlock, the user software must refresh the
WDT within a user-defined time period. If the software fails to do this periodical
refresh, an internal hardware reset will be initiated if enabled (WDRE = 1). The
software can be designed such that the WDT times out if the program does not work
properly.
The WDT in the device uses the system clock (XTAL1) as its time base. So strictly
speaking, it is a Watchdog counter rather than a Watchdog timer. The WDT register
will increment every 344,064 crystal clocks. The upper 8-bits of the time base register
(WDTD) are used as the reload register of the WDT.
The WDTS flag bit is set by WDT overflow and is not changed by WDT reset. User
software can clear WDTS by writing ‘1' to it.
Figure 20
provides a block diagram of the WDT. Two SFRs (WDTC and WDTD)
control Watchdog timer operation. During idle mode, WDT operation is temporarily
suspended, and resumes upon an interrupt exit from idle.
The time-out period of the WDT is calculated as follows:
Period = (255
WDTD)
×
344064
×
1/f
CLK (XTAL1)
where WDTD is the value loaded into the WDTD register and f
osc
is the oscillator
frequency.
Fig 20. Block diagram of programmable Watchdog timer
002aaa531
WDT
UPPER BYTE
WDT reset
internal reset
344064
clks
COUNTER
CLK (XTAL1)
external RST
WDTC
WDTD
Table 35:
Bit addressable; Reset value: 00H
Bit
7
Symbol
-
WDTC - Watchdog control register (address COH) bit allocation
6
-
5
-
4
3
2
1
0
WDOUT
WDRE
WDTS
WDT
SWDT
相關(guān)PDF資料
PDF描述
P89LV51RC2 8-bit 80C51 3 V low power 16/32/64 kB Flash microcontroller with 1 kB RAM
P89LV51RC2BN 8-bit 80C51 3 V low power 16/32/64 kB Flash microcontroller with 1 kB RAM
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P89V51RB2BA 8-bit 80C51 5 V low power 16/32/64 kB Flash microcontroller with 1 kB RAM
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P89LV51RD2BBC 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 3 V low power 16/32/64 kB Flash microcontroller with 1 kB RAM
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