參數(shù)資料
型號(hào)： P89LPC954FBD48,151
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 38/69頁(yè)
文件大小： 0K
描述： IC 80C51 MCU 16KB FLASH 48LQFP
標(biāo)準(zhǔn)包裝： 250
系列： LPC900
核心處理器： 8051
芯體尺寸： 8-位
速度： 18MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 40
程序存儲(chǔ)器容量： 16KB（16K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 512 x 8
電壓 - 電源 (Vcc/Vdd)： 2.4 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-LQFP
包裝： 托盤(pán)
其它名稱： 568-8736
P89LPC954FBD48,151-ND
P89LPC952_954_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 24 July 2008
43 of 69
NXP Semiconductors
P89LPC952/954
8-bit microcontroller with 10-bit ADC
7.25 Additional features
7.25.1 Software reset
The SRST bit in AUXR1 gives software the opportunity to reset the processor completely,
as if an external reset or watchdog reset had occurred. Care should be taken when writing
to AUXR1 to avoid accidental software resets.
7.25.2 Dual data pointers
The dual Data Pointers (DPTR) provides two different Data Pointers to specify the address
used with certain instructions. The DPS bit in the AUXR1 register selects one of the two
Data Pointers. Bit 2 of AUXR1 is permanently wired as a logic 0 so that the DPS bit may
be toggled (thereby switching Data Pointers) simply by incrementing the AUXR1 register,
without the possibility of inadvertently altering other bits in the register.
7.25.3 Debugger interface
This device contains a two-wire serial debugger interface designed to be used with
commercially available debugging tools. An additional trigger output is provided that
maybe triggered using the two-wire debugger interface.
The Freeze register allows the user to selectively disable clocking of peripheral device
timers while in the debugger mode.
The two-wire serial debugger interface can also be used be used to program the code
memory of these devices.
(1) Watchdog reset can also be caused by an invalid feed sequence, or by writing to WDCON not immediately followed by a feed
sequence.
Fig 16. Watchdog timer in Watchdog mode (WDTE = 1)
PRE2
PRE1
PRE0
-
WDRUN
WDTOF
WDCLK
WDCON (A7H)
SHADOW REGISTER
PRESCALER
002aaa905
8-BIT DOWN
COUNTER
WDL (C1H)
watchdog
oscillator
PCLK
÷32
MOV WFEED1, #0A5H
MOV WFEED2, #05AH
reset(1)
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