參數(shù)資料
型號: P89LPC938FDH,529
廠商: NXP Semiconductors
文件頁數(shù): 10/68頁
文件大小: 0K
描述: IC 80C51 MCU FLASH 8K 28-TSSOP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 51
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LED,POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: 622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1011-ND - BOARD FOR LPC938 TSSOP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱: 568-2013-5
935278546529
P89LPC938FDH-S
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9397
750
14051
K
oninklijk
e
Philips
Electronics
N.V
.2005.
All
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ights
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v
ed.
Pr
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data
sheet
Re
v
.01
25
Februar
y
2005
18
of
68
Philips
Semiconductor
s
P89LPC938
8-bit
micr
ocontr
oller
with
10-bit
A/D
con
ver
ter
Table 5:
P89LPC938 extended special function registers
Name
Description
SFR addr.
Bit functions and addresses
Reset value
MSB
LSB
Hex
Binary
ADC0HBND
ADC0 high _boundary register, left
(MSB)
FFEFh
FF
11111111
ADC0LBND
ADC0 low_boundary register (MSB)
FFEEh
00
00000000
AD0DAT0R
ADC0 data register 0, right (LSB)
FFFEh
AD0DAT0[7:0]
00
00000000
AD0DAT0L
ADC0 data register 0, left (MSB)
FFFFh
AD0DAT0[9:2]
00
00000000
AD0DAT1R
ADC0 data register 1, right (LSB)
FFFCh
AD0DAT1[7:0]
00
00000000
AD0DAT1L
ADC0 data register 1, left (MSB)
FFFDh
AD0DAT1[9:2]
00
00000000
AD0DAT2R
ADC0 data register 2, right (LSB)
FFFAh
AD0DAT2[7:0]
00
00000000
AD0DAT2L
ADC0 data register 2, left (MSB)
FFFBh
AD0DAT2[9:2]
00
00000000
AD0DAT3R
ADC0 data register 3, right (LSB)
FFF8h
AD0DAT3[7:0]
00
00000000
AD0DAT3L
ADC0 data register 3, left (MSB)
FFF9h
AD0DAT3[9:2]
00
00000000
AD0DAT4R
ADC0 data register 4, right (LSB)
FFF6h
AD0DAT4[7:0]
00
00000000
AD0DAT4L
ADC0 data register 4, left (MSB)
FFF7h
AD0DAT4[9:2]
00
00000000
AD0DAT5R
ADC0 data register 5, right (LSB)
FFF4h
AD0DAT5[7:0]
00
00000000
AD0DAT5L
ADC0 data register 5, left (MSB)
FFF5h
AD0DAT5[9:2]
00
00000000
AD0DAT6R
ADC0 data register 6, right (LSB)
FFF2h
AD0DAT6[7:0]
00
00000000
AD0DAT6L
ADC0 data register 6, left (MSB)
FFF3h
AD0DAT6[9:2]
00
00000000
AD0DAT7R
ADC0 data register 7, right (LSB)
FFF0h
AD0DAT7[7:0]
AD0DAT7L
ADC0 data register 7, left (MSB)
FFF1h
AD0DAT7[9:2]
BNDSTA0
ADC0 boundary status register
FFEDh
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