參數(shù)資料
型號(hào)： P89LPC9381FDH
廠商： NXP Semiconductors N.V.
元件分類(lèi)： 8位微控制器
英文描述： 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB 3 V byte-erasable flash with 10-bit ADC
封裝： P89LPC9381FDH<SOT361-1 (TSSOP28)|<<http://www.nxp.com/packages/SOT361-1.html<1<Always Pb-free,;
文件頁(yè)數(shù)： 33/59頁(yè)
文件大?。?/td> 286K
代理商： P89LPC9381FDH
P89LPC9381_1
Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet
Rev. 01 — 8 September 2006
39 of 60
Philips Semiconductors
P89LPC9381
8-bit microcontroller with 10-bit ADC
7.26.9 Power-on reset code execution
The P89LPC9381 contains two special ash elements: the Boot Vector and the Boot
Status Bit. Following reset, the P89LPC9381 examines the contents of the Boot Status
Bit. If the Boot Status Bit is set to zero, power-up execution starts at location 0000H, which
is the normal start address of the user’s application code. When the Boot Status Bit is set
to a value other than zero, the contents of the Boot Vector is used as the high byte of the
execution address and the low byte is set to 00H.
Table 8 shows the factory default Boot Vector setting for this device. A factory-provided
bootloader is pre-programmed into the address space indicated and uses the indicated
boot loader entry point to perform ISP functions. This code can be erased by the user.
Users who wish to use this loader should take precautions to avoid erasing the
1 kB sector that contains this boot loader. Instead, the page erase function can be
used to erase the rst eight 64 B pages located in this sector. A custom bootloader
can be written with the Boot Vector set to the custom boot loader, if desired.
7.26.10 Hardware activation of the bootloader
The bootloader can also be executed by forcing the device into ISP mode during a
power-on sequence (see the P89LPC9381
User’s Manual for specic information). This
has the same effect as having a non-zero status byte. This allows an application to be built
that will normally execute user code but can be manually forced into ISP operation. If the
factory default setting for the Boot Vector (0FH) is changed, it will no longer point to the
factory pre-programmed ISP bootloader code. After programming the ash, the status
byte should be programmed to zero in order to allow execution of the user’s application
code beginning at address 0000H.
7.27 User conguration bytes
Some user-congurable features of the P89LPC9381 must be dened at power-up and
therefore cannot be set by the program after start of execution. These features are
congured through the use of the ash byte UCFG1. Please see the P89LPC9381
User’s
Manual for additional details.
7.28 User sector security bytes
There are four User Sector Security Bytes on the P89LPC9381. Each byte corresponds to
one sector. Please see the P89LPC9381
User’s Manual for additional details.
8.
ADC
8.1 General description
The P89LPC9381 has a 10-bit, 8-channel multiplexed successive approximation
analog-to-digital converter module. A block diagram of the ADC is shown in Figure 15.
The ADC consists of an 8-input multiplexer which feeds a sample-and-hold circuit
Table 8.
Default Boot Vector values and ISP entry points
Device
Default
boot vector
Default
bootloader
entry point
Default bootloader
code range
1 kB sector
range
P89LPC9381
0FH
0F00H
0E00H to 0FFFH
0C00H to 0FFFH
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