參數(shù)資料
型號(hào): P89LPC932FHN
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit microcontroller with accelerated two-clock 80C51 core 8 kB Flash with 512-byte data EEPROM and 768-byte RAM
中文描述: 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQCC28
封裝: 6 X 6 MM, 0.85 MM HEIGHT, MO-220, SOT-788-1, PLASTIC, HVQFN-28
文件頁(yè)數(shù): 39/64頁(yè)
文件大?。?/td> 316K
代理商: P89LPC932FHN
9397 750 14871
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 10 May 2005
39 of 64
Philips Semiconductors
P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
7.23 Analog comparators
Two analog comparators are provided on the P89LPC932A1. Input and output options
allow use of the comparators in a number of different configurations. Comparator
operation is such that the output is a logic 1 (which may be read in a register and/or routed
to a pin) when the positive input (one of two selectable pins) is greater than the negative
input (selectable from a pin or an internal reference voltage). Otherwise the output is a
zero. Each comparator may be configured to cause an interrupt when the output value
changes.
The overall connections to both comparators are shown in
Figure 19
. The comparators
function to V
DD
= 2.4 V.
When each comparator is first enabled, the comparator output and interrupt flag are not
guaranteed to be stable for 10 microseconds. The corresponding comparator interrupt
should not be enabled during that time, and the comparator interrupt flag must be cleared
before the interrupt is enabled in order to prevent an immediate interrupt service.
7.23.1
Internal reference voltage
An internal reference voltage generator may supply a default reference when a single
comparator input pin is used. The value of the internal reference voltage, referred to as
V
REF
, is 1.23 V
±
10 %.
7.23.2
Comparator interrupt
Each comparator has an interrupt flag contained in its configuration register. This flag is
set whenever the comparator output changes state. The flag may be polled by software or
may be used to generate an interrupt. The two comparators use one common interrupt
vector. If both comparators enable interrupts, after entering the interrupt service routine,
the user needs to read the flags to determine which comparator caused the interrupt.
Fig 19. Comparator input and output connections.
comparator 1
CP1
CN1
(P0.4) CIN1A
(P0.3) CIN1B
(P0.5) CMPREF
V
REF
OE1
change detect
CO1
CMF1
interrupt
002aaa904
CMP1 (P0.6)
EC
change detect
CMF2
comparator 2
OE2
CO2
CMP2 (P0.0)
CP2
CN2
(P0.2) CIN2A
(P0.1) CIN2B
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