參數(shù)資料
型號(hào): P89LPC9321FN,112
廠商: NXP Semiconductors
文件頁數(shù): 34/71頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 28-DIP
產(chǎn)品培訓(xùn)模塊: LPC9351/9321 Overview
標(biāo)準(zhǔn)包裝: 13
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-DIP(0.600",15.24mm)
包裝: 管件
配用: 568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
622-1003-ND - KIT FOR LCD DEMO
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱: 568-4700-5
935287657112
P89LPC9321FN
P89LPC9321
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 16 November 2010
4 of 71
NXP Semiconductors
P89LPC9321
8-bit microcontroller with accelerated two-clock 80C51 core
4.
Block diagram
Fig 1.
Block diagram
ACCELERATED 2-CLOCK 80C51 CPU
8 kB
CODE FLASH
256-BYTE
DATA RAM
PORT 2
CONFIGURABLE I/Os
PORT 1
CONFIGURABLE I/Os
PORT 0
CONFIGURABLE I/Os
KEYPAD
INTERRUPT
PROGRAMMABLE
OSCILLATOR DIVIDER
CPU
clock
CONFIGURABLE
OSCILLATOR
ON-CHIP RC
OSCILLATOR
WITH CLOCK
DOUBLER
internal bus
POWER MONITOR
(POWER-ON RESET,
BROWNOUT RESET)
002aae102
UART
ANALOG
COMPARATORS
(PGA1)
512-BYTE
AUXILIARY RAM
I2C-BUS
512-BYTE
DATA EEPROM
PORT 3
CONFIGURABLE I/Os
CCU (CAPTURE/
COMPARE UNIT)
P89LPC9321
WATCHDOG TIMER
AND OSCILLATOR
TIMER 0
TIMER 1
REAL-TIME CLOCK/
SYSTEM TIMER
SPI
P3[1:0]
P2[7:0]
P1[7:0]
P0[7:0]
TXD
RXD
SCL
SDA
T0
T1
CMP2
CIN2B
CIN2A
CMP1
CIN1A
CIN1B
OCA
OCB
OCC
OCD
ICA
ICB
SPICLK
MOSI
MISO
SS
CRYSTAL
OR
RESONATOR
XTAL2
XTAL1
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