參數(shù)資料
型號(hào): P89LPC9221FDH,512
廠商: NXP Semiconductors
文件頁數(shù): 14/46頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 20-TSSOP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 75
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LED,POR,PWM,WDT
輸入/輸出數(shù): 18
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
包裝: 管件
配用: 622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1010-ND - BOARD FOR LPC922 TSSOP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名稱: 568-3223-5
935278674512
P89LPC9221FDH
Philips Semiconductors
P89LPC920/921/922/9221
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 08 — 15 December 2004
21 of 46
9397 750 14469
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.12.7
Additional port features
After power-up, all pins are in Input-Only mode. Please note that this is different
from the LPC76x series of devices.
After power-up, all I/O pins except P1.5, may be congured by software.
Pin P1.5 is input only. Pins P1.2 and P1.3 and are congurable for either input-only
or open-drain.
Every output on the P89LPC920/921/922/9221 has been designed to sink typical
LED drive current. However, there is a maximum total output current for all ports
which must not be exceeded. Please refer to Table 8 “DC electrical characteristics” for
detailed specications.
All ports pins that can function as an output have slew rate controlled outputs to limit
noise generated by quickly switching output signals. The slew rate is factory-set to
approximately 10 ns rise and fall times.
8.13 Power monitoring functions
The P89LPC920/921/922/9221 incorporates power monitoring functions designed to
prevent incorrect operation during initial power-up and power loss or reduction during
operation. This is accomplished with two hardware functions: Power-on Detect and
Brownout detect.
8.13.1
Brownout detection
The Brownout detect function determines if the power supply voltage drops below a
certain level. The default operation is for a Brownout detection to cause a processor
reset, however it may alternatively be congured to generate an interrupt.
Brownout detection may be enabled or disabled in software.
If Brownout detection is enabled, the brownout condition occurs when VDD falls below
the brownout trip voltage, VBO (see Table 8 “DC electrical characteristics”), and is
negated when VDD rises above VBO. If the P89LPC920/921/922/9221 device is to
operate with a power supply that can be below 2.7 V, BOE should be left in the
unprogrammed state so that the device can operate at 2.4 V, otherwise continuous
brownout reset may prevent the device from operating.
For correct activation of Brownout detect, the VDD rise and fall times must be
observed. Please see Table 8 “DC electrical characteristics” for specications.
8.13.2
Power-on detection
The Power-on Detect has a function similar to the Brownout detect, but is designed to
work as power comes up initially, before the power supply voltage reaches a level
where Brownout detect can work. The POF ag in the RSTSRC register is set to
indicate an initial power-up condition. The POF ag will remain set until cleared by
software.
8.14 Power reduction modes
The P89LPC920/921/922/9221 supports three different power reduction modes.
These modes are Idle mode, Power-down mode, and total Power-down mode.
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