參數(shù)資料
型號(hào): P89LPC916
廠商: NXP Semiconductors N.V.
英文描述: 8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V Flash with 8-bit A/D converter
中文描述: 8 - 8加速雙位單片機(jī)80C51的時(shí)鐘核心2 Kb的3伏閃存位A / D轉(zhuǎn)換器
文件頁(yè)數(shù): 48/72頁(yè)
文件大?。?/td> 344K
代理商: P89LPC916
Philips Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
Product data
Rev. 04 — 17 December 2004
48 of 72
9397 750 14397
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
The SPI interface has four pins: SPICLK, MOSI, MISO, and SS:
SPICLK, MOSI and MISO are typically tied together between two or more SPI
devices. Data flows from master to slave on MOSI (Master Out Slave In) pin and
flows from slave to master on MISO (Master In Slave Out) pin. The SPICLK signal
is output in the master mode and is input in the slave mode. If the SPI system is
disabled, i.e., SPEN (SPCTL.6) = 0 (reset value), these pins are configured for port
functions.
SS is the optional slave select pin. In a typical configuration, an SPI master asserts
one of its port pins to select one SPI device as the current slave. An SPI slave
device uses its SS pin to determine whether it is selected.
Typical connections are shown in
Figure 17
,
18
, and
19
.
Fig 16. SPI block diagram (P89LPC916).
002aaa497
CPU clock
DIVIDER
BY 4, 16, 64, 128
SELECT
CLOCK LOGIC
SPI CONTROL REGISTER
READ DATA BUFFER
8-BIT SHIFT REGISTER
SPI CONTROL
SPI STATUS REGISTER
S
S
W
S
SPI clock (master)
P
S
M
S
M
M
S
MISO
P2.3
MOSI
P2.2
SPICLK
P2.5
SS
P2.4
SPI
interrupt
request
internal
data
bus
S
S
S
M
D
M
C
C
S
S
MSTR
SPEN
clock
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P89LPC9161FDH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core, 2 kB 3 V byte-erasable flash with 8-bit ADC
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