參數(shù)資料
型號(hào): P89LPC916
廠商: NXP Semiconductors N.V.
英文描述: 8-bit microcontrollers with accelerated two-clock 80C51 core 2 kB 3 V Flash with 8-bit A/D converter
中文描述: 8 - 8加速雙位單片機(jī)80C51的時(shí)鐘核心2 Kb的3伏閃存位A / D轉(zhuǎn)換器
文件頁(yè)數(shù): 29/72頁(yè)
文件大?。?/td> 344K
代理商: P89LPC916
Philips Semiconductors
P89LPC915/916/917
8-bit microcontrollers with accelerated two-clock 80C51 core
Product data
Rev. 04 — 17 December 2004
29 of 72
9397 750 14397
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.
Functional description
Remark:
Please refer to the P89LPC915/916/917 User’s Manualfor a more detailed
functional description.
9.1 Enhanced CPU
The P89LPC915/916/917 uses an enhanced 80C51 CPU which runs at 6 times the
speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles,
and most instructions execute in one or two machine cycles.
9.2 Clocks
9.2.1
Clock definitions
The P89LPC915/916/917 device has several internal clocks as defined below:
OSCCLK —
Input to the DIVM clock divider. OSCCLK is selected from one of three
clock sources (see
Figure 10
) and can also be optionally divided to a slower
frequency (see
Section 9.7 “CPU Clock (CCLK) modification: DIVM register”
).
Note:
f
osc
is defined as the OSCCLK frequency.
CCLK —
CPU clock; output of the clock divider. There are two CCLK cycles per
machine cycle, and most instructions are executed in one to two machine cycles (two
or four CCLK cycles).
RCCLK —
The internal 7.373 MHz RC oscillator output.
PCLK —
Clock for the various peripheral devices and is CCLK/2
9.2.2
CPU clock (OSCCLK)
The P89LPC915/916/917 provide user-selectable oscillator options in generating the
CPU clock. This allows optimization for a range of needs from high precision to lowest
possible cost. These options are configured when the FLASH is programmed and
include an on-chip Watchdog oscillator, an on-chip RC oscillator, and an external
clock input.
9.2.3
Clock output (P89LPC917)
The P89LPC917 supports a user selectable clock output function on the CLKOUT
pin. This allows external devices to synchronize to the P89LPC917. This output is
enabled by the ENCLK bit in the TRIM register. The frequency of this clock output is
1
2
that of the CCLK. If the clock output is not needed in Idle mode, it may be turned
off prior to entering Idle, saving additional power.
9.3 On-chip RC oscillator option
The P89LPC915/916/917 has a 6-bit TRIM register that can be used to tune the
frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory
pre-programmed value to adjust the oscillator frequency to 7.373 MHz,
±
1 % at room
temperature. End-user applications can write to the TRIM register to adjust the
on-chip RC oscillator to other frequencies.
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