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參數(shù)資料
| 型號： | P89LPC902FD |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM |
| 中文描述： | 8-BIT, FLASH, 7.3728 MHz, MICROCONTROLLER, PDSO8 |
| 封裝： | 3.90 MM, PLASTIC, MS-012, SOT-96-1, SO-8 |
| 文件頁數(shù)： | 25/55頁 |
| 文件大?。?/td> | 1236K |
| 代理商： | P89LPC902FD |
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Philips Semiconductors
P89LPC901/902/903
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 04 — 21 November 2003
25 of 55
9397 750 12293
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
8.2.5
High speed oscillator option (P89LPC901)
This option supports an external crystal in the range of 4 MHz to 12 MHz. Ceramic
resonators are also supported in this configuration. If CCLK is 8 MHz or slower, the
CLKLP SFR bit (AUXR1.7) can be set to ‘1’ to reduce power consumption. On reset,
CLKLP is ‘0’ allowing highest performance access. This bit can then be set in
software if CCLK is running at 8 MHz or slower.
8.2.6
Clock output (P89LPC901)
The P89LPC901 supports a user selectable clock output function on the
XTAL2/CLKOUT pin when crystal oscillator is not being used. This condition occurs if
another clock source has been selected (on-chip RC oscillator, Watchdog oscillator,
external clock input on X1) and if the Real-Time clock is not using the crystal
oscillator as its clock source. This allows external devices to synchronize to the
P89LPC901. This output is enabled by the ENCLK bit in the TRIM register. The
frequency of this clock output is
1
2
that of the CCLK. If the clock output is not needed
in Idle mode, it may be turned off prior to entering Idle, saving additional power.
8.3 On-chip RC oscillator option
The P89LPC901/902/903 has a 6-bit TRIM register that can be used to tune the
frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory
pre-programmed value to adjust the oscillator frequency to 7.373 MHz,
±
2.5%.
End-user applications can write to the Trim register to adjust the on-chip RC oscillator
to other frequencies. If CCLK is 8 MHz or slower, the CLKLP SFR bit (AUXR1.7) can
be set to ‘1’ to reduce power consumption. On reset, CLKLP is ‘0’ allowing highest
performance access. This bit can then be set in software if CCLK is running at 8 MHz
or slower.
8.4 Watchdog oscillator option
The Watchdog has a separate oscillator which has a frequency of 400 kHz. This
oscillator can be used to save power when a high clock frequency is not needed.
8.5 External clock input option (P89LPC901)
In this configuration, the processor clock is derived from an external source driving
the XTAL1/P3.1 pin. The rate may be from 0 Hz up to 12 MHz. The XTAL2/P3.0 pin
may be used as a standard port pin or a clock output.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P89LPC902FD,112 | 功能描述:8位微控制器 -MCU 80C51 1K FL 128B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P89LPC902FD.512 | 制造商:NXP Semiconductors 功能描述:8BIT MCU 1K FLASH 89LC902 SOIC8 |
| P89LPC902FD112 | 制造商:NXP Semiconductors 功能描述:IC 8BIT MCU 80C51 12MHZ SOIC-8 |
| P89LPC902FN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM |
| P89LPC902FN,129 | 功能描述:8位微控制器 -MCU 80C51 1K FL 128B RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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