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參數(shù)資料
| 型號： | P89C739 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit Flash microcontrollers |
| 中文描述： | 8位閃存微控制器 |
| 文件頁數(shù)： | 19/64頁 |
| 文件大?。?/td> | 360K |
| 代理商： | P89C739 |
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1998 Apr 07
19
Philips Semiconductors
Product specification
8-bit Flash microcontrollers
P89C738; P89C739
10 TIMERS/COUNTERS
The P89C738 contains three 16-bit timer/counters:
Timer 0, Timer 1 and Timer 2; and one 8-bit timer, the
Watchdog Timer (T3). Timer 0, Timer 1 and Timer 2 may
be programmed to carry out the following functions:
Measure time intervals and pulse durations
Count events
Generate interrupt requests.
10.1
Timer 0 and Timer 1
Timers 0 and 1 each have a control bit in SFR TMOD that
selects the timer or counter function of the corresponding
timer. In the timer function, the register is incremented
every machine cycle. Thus, one can think of it as counting
machine cycles. Since a machine cycle consists
of 12 oscillator periods, the count rate is
1
12
of the
oscillator frequency.
In the counter function, the register is incremented in
response to a HIGH-to-LOW transition at the
corresponding external input pin, T0 or T1. In this function,
the external input is sampled during S5P2 of every
machine cycle. When the samples show a HIGH in one
cycle and a LOW in the next cycle, the counter is
incremented. Thus, it takes two machine cycles
(24 oscillator periods) to recognize a HIGH-to-LOW
transition. There are no restrictions on the duty cycle of the
external input signal, but to ensure that a given level is
sampled at least once before it changes, it should be held
for at least one full machine cycle.
Timer 0 and Timer 1 can be programmed independently to
operate in one of four modes:
Mode 0 8-bit timer/counter with divide-by-32 prescaler
Mode 1 16-bit timer/counter
Mode 2 8-bit timer/counter with automatic reload
Mode 3 Timer 0: one 8-bit timer/counter and one 8-bit
timer. Timer 1: stopped.
When Timer 0 is in Mode 3, Timer 1 can be programmed
to operate in Modes 0, 1 or 2 but cannot set an interrupt
request flag and generate an interrupt. However, the
overflow from Timer 1 can be used to pulse the Serial Port
transmission-rate generator. With a 16 MHz crystal, the
counting frequency of these timer/counters is as follows:
In the timer function, the timer is incremented at a
frequency of 1.33 MHz (
1
12
×
oscillator frequency)
In the counter function, the frequency handling range for
external inputs is 0 to 0.66 MHz.
Both internal and external inputs can be gated to the timer
by a second external source for directly measuring pulse
duration.
The timers are started and stopped under software control.
Each one sets its interrupt request flag when it overflows
from all logic 1's to all logic 0's (respectively, the automatic
reload value), with the exception of Mode 3 as previously
described.
10.1.1
Timer/Counter Mode Control Register (TMOD)
Table 9
Timer/Counter Mode Control Register (SFR address 89H)
Table 10
Description of TMOD bits for Timer 1 and Timer 0
Timer 0: bit TMOD.0 to TMOD.3; Timer 1: bit TMOD.4 to TMOD.7; n = 0, 1.
7
6
5
4
3
2
1
0
GATE
C/T
M1
M0
GATE
C/T
M1
M0
BIT
SYMBOL
DESCRIPTION
7 and 3
GATE
Gating control
. When set Timer/counter ‘n’ is enabled only when INTn pin is HIGH and
control bit TRn (TR1 or TR0) is set. When cleared Timer n is enabled whenever TRn
control bit is set.
Timer or Counter Selector
. Cleared for Timer operation; input from internal system
clock. Set for Counter operation; input from pin Tn (T1 or T0).
Timer 0, Timer 1 mode select
; see Table 11.
6 and 2
C/T
5 and 1
4 and 0
M1
M0
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