1
1
P
P
8
P
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6
P
Table 1
Pin description for DIP40; QFP44; PLC44; QFP64 and PLCC68.
SYMBOL
PIN
(1)
DESCRIPTION
PLCC68
QFP64
PLCC44
QFP44
DIP40
P1.0/T2
P1.1/T2EX
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
19
21
22
23
25
27
28
29
30
11
13
14
15
17
19
20
21
22
16
15
14
13
12
1
2
3
4
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
Port 1: P1.0 to P1.7
; 8-bit quasi-bidirectional I/O port. Port 1 can
sink/source one TTL (= 4 LSTTL) input. It can drive CMOS inputs
without external pull-ups.
Port 1 alternative functions are:
T2
; Timer/event counter 2 external
event counter input (falling edge triggered).
T2EX
; Timer/event
counter 2 capture/reload trigger or external interrupt 2 input (falling
edge triggered).
Reset
; a HIGH level on this pin for two machine cycles while the
oscillator is running, resets the device. An internal pull-down resistor
permits power-on reset using only a capacitor connected to V
DD
.
After a Watchdog Timer overflow this pin is pulled HIGH while the
internal reset signal is active.
Port 3: P3.0 to P3.7
; 8-bit quasi-bidirectional I/O Port with internal
pull-ups. Port 3 can sink/source one TTL (= 4 LSTTL) input. It can
drive CMOS inputs without external pull-ups.
P3.0/RXD/data
P3.1/TXD/clock 39
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6WR
P3.7/RD
34
26
29
30
31
32
33
35
37
5
7
8
9
10
11
44
43
11
13
14
15
16
17
18
19
10
11
12
13
14
15
16
17
Port 3 alternative functions are:
RXD/data
; Serial Port data input
(asynchronous) or data input/output (synchronous).
TXD/clock
; Serial Port data output (asynchronous) or clock output
(synchronous).
INT0
; External interrupt 0 or gate control input for
Timer/event counter 0.
INT1
; External interrupt 1 or gate control
input for Timer/event counter 1.
T0
; external input for Timer/event
counter 0.
T1;
external input for Timer/event counter 1.
WR
; external data memory write strobe.
RD
; external data memory
read strobe.
Crystal input 2
: output of the inverting amplifier that forms the
oscillator. This pin left open-circuit when an external oscillator clock
is used (see Figs 18 and 20).
Crystal input 1
: input to the inverting amplifier that forms the
oscillator, and input to the internal clock generator. Receives the
external oscillator clock signal when an external oscillator is used
(see Figs 18 and 20).
Ground
: circuit ground potential.
40
41
42
43
45
47
XTAL2
48
38
42
20
18
XTAL1
49
39
41
21
19
V
SS
51
41
40
22
20