參數(shù)資料
型號： P87LPC767FN,112
廠商： NXP Semiconductors
文件頁數(shù)： 30/61頁
文件大?。?/td> 0K
描述： IC 80C51 MCU 4K OTP 20-DIP
產(chǎn)品培訓模塊： Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝： 18
系列： LPC700
核心處理器： 8051
芯體尺寸： 8-位
速度： 20MHz
連通性： I²C，UART/USART
外圍設備： 欠壓檢測/復位，LED，POR，WDT
輸入/輸出數(shù)： 18
程序存儲器容量： 4KB（4K x 8）
程序存儲器類型： OTP
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 20-DIP（0.300"，7.62mm）
包裝： 管件
其它名稱： 568-3217-5
935267192112
P87LPC767FN
Philips Semiconductors
Product data
P87LPC767
Low power, low price, low pin count (20 pin)
microcontroller with 4-kbyte OTP and 8-bit A/D converter
2002 Mar 25
33
Mode 1
Mode 1 is the same as Mode 0, except that all 16 bits of the timer
register (THn and TLn) are used. See Figure 27
Mode 2
Mode 2 configures the Timer register as an 8-bit Counter (TL1) with
automatic reload, as shown in Figure 28. Overflow from TLn not only
sets TFn, but also reloads TLn with the contents of THn, which must
be preset by software. The reload leaves THn unchanged. Mode 2
operation is the same for Timer 0 and Timer 1.
Mode 3
When Timer 1 is in Mode 3 it is stopped. The effect is the same as
setting TR1 = 0.
Timer 0 in Mode 3 establishes TL0 and TH0 as two separate 8-bit
counters. The logic for Mode 3 on Timer 0 is shown in Figure 29.
TL0 uses the Timer 0 control bits: C/T, GATE, TR0, INT0, and TF0.
TH0 is locked into a timer function (counting machine cycles) and
takes over the use of TR1 and TF1 from Timer 1. Thus, TH0 now
controls the “Timer 1” interrupt.
Mode 3 is provided for applications that require an extra 8-bit timer.
With Timer 0 in Mode 3, an P87LPC767 can look like it has three
Timer/Counters. When Timer 0 is in Mode 3, Timer 1 can be turned
on and off by switching it into and out of its own Mode 3. It can still
be used by the serial port as a baud rate generator, or in any
application not requiring an interrupt.
SU01174
TLn
(8 BITS)
THn
(8 BITS)
OSC/6
OR
OSC/12
OVERFLOW
Tn PIN
TnOE
TOGGLE
CONTROL
C/T = 1
C/T = 0
Tn PIN
TRn
GATE
INTn PIN
INTERRUPT
TFn
Figure 27. Timer/Counter 0 or 1 in Mode 1 (16-Bit Counter)
SU01392
TLn
(8 BITS)
THn
(8 BITS)
OSC/6
or
OSC/12
OVERFLOW
Tn PIN
TnOE
TOGGLE
CONTROL
C/T = 1
C/T = 0
Tn PIN
TRn
GATE
INTn PIN
INTERRUPT
TFn
RELOAD
Figure 28. Timer/Counter 0 or 1 in Mode 2 (8-Bit Auto-Reload)
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