參數(shù)資料
型號: P87LPC760BDH,118
廠商: NXP Semiconductors
文件頁數(shù): 55/56頁
文件大小: 0K
描述: IC 80C51 MCU 1KB OTP 14TSSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: LPC700
核心處理器: 8051
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LED,POR,WDT
輸入/輸出數(shù): 12
程序存儲器容量: 1KB(1K x 8)
程序存儲器類型: OTP
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
包裝: 帶卷 (TR)
Philips Semiconductors
Preliminary data
P87LPC760
Low power, low price, low pin count (14 pin)
microcontroller with 1 kbyte OTP
2002 Mar 07
5
PIN DESCRIPTIONS
MNEMONIC
PIN NO.
TYPE
NAME AND FUNCTION
P0.3–P0.6
10, 12–14
I/O
Port 0: Port 0 is an 4-bit I/O port with a user-configurable output type. Port 0 latches are
configured in the quasi-bidirectional mode and have either ones or zeros written to them
during reset, as determined by the PRHI bit in the UCFG1 configuration byte. The operation
of port 0 pins as inputs and outputs depends upon the port configuration selected. Each port
pin is configured independently. Refer to the section on I/O port configuration and the DC
Electrical Characteristics for details.
The Keyboard Interrupt feature operates with port 0 pins.
Port 0 also provides various special functions as described below.
14
I
P0.3
CIN1B
Comparator 1 positive input B.
13
I
P0.4
CIN1A
Comparator 1 positive input A
12
I
P0.5
CMPREF
Comparator reference (negative) input.
10
O
P0.6
CMP1
Comparator 1 output
P1.0–P1.3
P1.5, P1.7
1–2
6–9
I/O
Port 1: Port 1 is an 6-bit I/O port with a user-configurable output type, except for three pins
as noted below. Port 1 latches are configured in the quasi-bidirectional mode and have ei-
ther ones or zeros written to them during reset, as determined by the PRHI bit in the UCFG1
configuration byte. The operation of the configurable port 1 pins as inputs and outputs de-
pends upon the port configuration selected. Each of the configurable port pins are pro-
grammed independently. Refer to the section on I/O port configuration and the DC Electrical
Characteristics for details.
Port 1 also provides various special functions as described below.
9
O
P1.0
TxD
Transmitter output for the serial port.
8
I
P1.1
RxD
Receiver input for the serial port.
7
I/O
P1.2
T0
Timer/counter 0 external count input or overflow output.
SCL
I2C serial clock input/output. When configured as an output,
P1.2 is open drain, in order to conform to I2C specifications.
6
I
I/O
P1.3
INT0
External interrupt 0 input.
SDA
I2C serial data input/output. When configured as an output, P1.3
is open drain, in order to conform to I2C specifications.
2
I
P1.5
RST
External Reset input (if selected via EPROM configuration). A
low on this pin resets the microcontroller, causing I/O ports and
peripherals to take on their default states, and the processor
begins execution at address 0. When used as a port pin, P1.5 is
a Schmitt trigger input only.
P2.0–P2.1
4, 5
I/O
Port 2: Port 2 is a 2-bit I/O port with a user-configurable output type. Port 2 latches are con-
figured in the quasi-bidirectional mode and have either ones or zeros written to them during
reset, as determined by the PRHI bit in the UCFG1 configuration byte. The operation of port
2 pins as inputs and outputs depends upon the port configuration selected. Each port pin is
configured independently. Refer to the section on I/O port configuration and the DC Electri-
cal Characteristics for details.
Port 2 also provides various special functions as described below.
5
O
P2.0
X2
Output from the oscillator amplifier (when a crystal oscillator
option is selected via the EPROM configuration).
CLKOUT
CPU clock divided by 6 clock output when enabled via SFR bit
and in conjunction with internal RC oscillator or external clock
input.
4
I
P2.1
X1
Input to the oscillator circuit and internal clock generator circuits
(when selected via the EPROM configuration).
VSS
3
I
Ground: 0 V reference.
VDD
11
I
Power Supply: This is the power supply voltage for normal operation as well as Idle and
Power Down modes.
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