參數(shù)資料
型號(hào)： P87C749
廠商： NXP Semiconductors N.V.
英文描述： 80C51 8-bit microcontroller family 2K/64 OTP/ROM, 5 channel 8-bit A/D, PWM, low pin count
中文描述： 80C51的8位單片機(jī)系列2K/64檢察官辦公室/光盤(pán)，5通道8位A / D轉(zhuǎn)換，脈寬調(diào)制，低管腳數(shù)
文件頁(yè)數(shù)： 5/22頁(yè)
文件大?。?/td> 200K
代理商： P87C749
Philips Semiconductors
Preliminary specification
83C749/87C749
80C51 8-bit microcontroller family
2K/64 OTP/ROM, 5 channel 8-bit A/D, PWM, low pin count
1998 Apr 23
5
PIN DESCRIPTION
MNEMONIC
PIN NO.
TYPE
NAME AND FUNCTION
V
SS
12
I
Circuit Ground Potential.
V
CC
28
I
Supply voltage during normal, idle, and power-down operation.
P0.0–P0.4
8–6
23, 24
I/O
Port 0:
Port 0 is a 5-bit bidirectional port. Port 0.0–P0.2 are open drain. Port 0.0–P0.2 pins that have
1s written to them float, and in that state can be used as high-impedance inputs. P0.3–P0.4 are
bidirectional I/O port pins with internal pull-ups. These pins are driven low if the port register bit is
written with a 0. The state of the pin can always be read from the port register by the program. Port 0.3
and 0.4 have internal pull-ups that function identically to port 3. Pins that have 1s written to them are
pulled high by the internal pull-ups and can be used as inputs.
While P0.0 anbd P0.1 differ from “standard TTL” characteristics, they are close enough for the pins to
still be used as general-purpose I/O.
V
PP
(P0.2) –
Programming voltage input. (See Note 2.)
OE/PGM (P0.1) –
Input which specifies verify mode (output enable) or the program mode.
OE/PGM = 1 output enabled (verify mode).
OE/PGM = 0 program mode.
ASEL (P0.0) –
Input which indicates which bits of the EPROM address are applied to port 3.
ASEL = 0 low address byte available on port 3.
ASEL = 1 high address byte available on port 3 (only the three least significant bits are used).
6
7
I
I
8
I
P1.0–P1.7
13–17,
20–22
I/O
Port 1:
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s written to
them are pulled high by the internal pull-ups and can be used as inputs. P0.3–P0.4 pins are
bidirectional I/O port pins with internal pull-ups. As inputs, port 1 pins that are externally pulled low will
source current because of the internal pull-ups. (See DC Electrical Characteristics: I
IL
). Port 1 also
serves the special function features of the SC80C51 family as listed below:
INT0 (P1.5):
External interrupt.
INT1 (P1.6):
External interrupt.
T0 (P1.7):
Timer 0 external input.
ADC0 (P1.0)–ADC4 (P1.4):
Port 1 also functions as the inputs to the five channel multiplexed A/D
converter. These pins can be used as outputs only if the A/D function has been disabled. These pins
can be used as digital inputs while the A/D converter is enabled.
20
21
22
I
I
I
I
13–17
Port 1 serves to output the addressed EPROM contents in the verify mode and accepts as inputs the
value to program into the selected address during the program mode.
P3.0–P3.7
5–1,
27–25
I/O
Port 3:
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s written to
them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 3 pins that are
externally being pulled low will source current because of the pull-ups. (See DC Electrical
Characteristics: I
IL
). Port 3 also functions as the address input for the EPROM memory location to be
programmed (or verified). The 11-bit address is multiplexed into this port as specified by P0.0/ASEL.
RST
9
I
Reset:
A high on this pin for two machine cycles while the oscillator is running resets the device. An
internal diffused resistor to V
SS
permits a power-on RESET using only an external capacitor to V
CC
.
After the device is reset, a 10-bit serial sequence, sent LSB first, applied to RESET, places the device
in the programming state allowing programming address, data and V
PP
to be applied for programming
or verification purposes. The RESET serial sequence must be synchronized with the X1 input.
X1
11
I
Crystal 1:
Input to the inverting oscillator amplifier and input to the internal clock generator circuits. X1
also serves as the clock to strobe in a serial bit stream into RESET to place the device in the
programming state.
X2
10
O
Crystal 2:
Output from the inverting oscillator amplifier.
AV
CC 1
AV
SS
1
NOTE:
1. AV
(reference ground) must be connected to 0V (ground). AV
CC
(reference input) cannot differ from V
CC
by more than
±
0.2V, and must be
in the range 4.5V to 5.5V.
2. When P0.2 is at or close to 0 volt, it may affect the internal ROM operation. We recommend that P0.2 be tied to V
CC
via a small pullup
(e.g., 2k
).
19
I
Analog supply voltage and reference input.
18
I
Analog supply and reference ground.
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